SoC Performance Architect (Server CPU)

Job Title

SoC Performance Architect (Server CPU)

Role Summary

Lead server CPU workload analysis, performance modeling, competitive projection, and cross‑stack optimization for SoC products. Work with architecture, design, software, and systems teams to identify bottlenecks and drive measurable performance improvements across hardware and software.

Experience Level

Mid-level. The role targets experienced engineers and also welcomes early‑career PhD graduates; specific experience expectations vary by degree (see Education Requirements).

Responsibilities

Define methodologies and execute analysis to quantify workload behavior and guide product decisions.

• Define performance methodologies, metrics, and KPI frameworks for workload tracking and feature evaluation.
• Perform bottleneck analysis across CPU cores, cache hierarchy, memory subsystem/controllers, on‑chip fabric, and I/O.
• Use profiling and PMU tools to capture hotspots, call stacks, CPI breakdowns, memory behavior, and microarchitectural stalls.
• Conduct hardware/software sensitivity studies and trace/trace‑based analyses to quantify impacts of architecture and software changes.
• Build analytical and empirical models for workload behavior, scaling, and feature sensitivity.
• Develop performance projections for internal roadmaps and external competitors.
• Identify and prioritize optimization opportunities and drive cross‑functional execution with architecture, design, compiler, OS, firmware, and application teams.
• Communicate findings, tradeoffs, and product implications to technical and executive stakeholders.

Requirements

Must-have technical skills and practical experience required for the role; preferred skills listed separately.

• Deep understanding of CPU microarchitecture (pipelines, OoO execution, branch prediction, caching, prefetching, SMT, performance bottlenecks).
• Strong knowledge of SoC architecture: on‑chip interconnect/fabric, memory controllers, DRAM systems, coherency, and I/O subsystems.
• Solid understanding of OS and compiler behavior and their effects on runtime performance (scheduling, memory management, synchronization, code generation).
• Hands‑on experience with industry performance analysis and profiling tools and handling large profiling datasets.
• Experience enabling and debugging complex server workloads in Linux environments.
• Strong scripting and data analysis skills for building performance models and automating analysis.
• Experience in system architecture technology areas (e.g., power systems, shared resource management, limits/thermal management, hardware islands).

Preferred:

• Pre‑silicon performance modeling, simulation, or trace‑based analysis experience.
• Familiarity with PMU‑based top‑down analysis, CPI decomposition, memory subsystem analysis, and sensitivity modeling.

Education Requirements

Qualifications include Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field. The posting specifies: Bachelor's +2 years relevant experience OR Master's +1 year relevant experience OR PhD (new graduates welcome). Equivalent practical experience is implied where noted.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.