SoC Logic Design Engineer

Job Title

SoC Logic Design Engineer

Role Summary

The SoC Logic Design Engineer will design and implement RTL logic for SoC blocks, integrate IP and subsystems into full-chip designs, and optimize designs for power, performance, area, and timing. The role sits in Intel's silicon engineering organization and works across architecture, verification, and physical implementation teams.

Work will focus on producing production-quality RTL, ensuring design readiness for physical implementation, and addressing security and integration requirements.

Experience Level

Mid-level. The posting specifies minimum experience of Bachelor's +4 years or Master's +3 years; typical expectation is roughly 3–7 years of relevant SoC/RTL design experience.

Responsibilities

The engineer will be responsible for block-level RTL development and SoC-level integration tasks to meet architectural and implementation targets.

• Develop RTL and logic designs for SoC blocks and subsystems per architecture and microarchitecture specifications.
• Integrate IP blocks and subsystems into full-chip SoC designs and collaborate on IP/SoC handoff.
• Participate in definition of architecture and microarchitecture features for assigned blocks.
• Optimize designs for power, performance, area, and timing using industry tools and techniques.
• Perform quality checks to ensure design integrity and readiness for physical implementation.
• Review verification plans, analyze failing RTL tests, and implement corrective actions.
• Apply secure development practices to meet hardware security models and objectives.
• Collaborate with IP providers to integrate and validate IP at the SoC level.

Requirements

Must-have technical skills and experience required for successful performance in this role.

• Proven RTL coding experience (Verilog).
• Expertise in SoC integration, SoC clocking, and low-power design methodologies.
• Experience with timing and power convergence strategies and physical implementation optimization.
• Practical knowledge of Clock Domain Crossing (CDC) techniques and Network-on-Chip (NoC) architectures.
• Working experience with AMBA protocols: CHI, AXI, AHB, and APB.
• Experience reviewing verification plans and resolving RTL test failures.
• Familiarity with secure hardware development practices and IP validation processes.
• Preferred: hands-on experience taking a design from spec to timing closure in at least one SoC/ASIC project.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related specialized field with 4+ years of relevant logic/RTL experience; OR Master's degree in those fields with 3+ years of relevant experience. (Degrees and years specified in the posting.)

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.