SoC Integration Engineer

Job Title

SoC Integration Engineer

Role Summary

The SoC Integration Engineer will integrate and develop high-performance Network-on-Chip (NoC) and interconnect platform solutions for Intel's Unified Intel Chassis (UIC) group. The role partners with SoC architecture, IP, and physical design teams to deliver scalable, optimized silicon platforms that meet power, performance, and area (PPA) targets.

Primary location: Santa Clara, CA (additional locations: Folsom, CA; Hillsboro, OR; Austin, TX). Eligible for hybrid work model.

Experience Level

Mid-level. The posting requires substantial experience: typically a Bachelor's degree plus ~6+ years' relevant experience or a Master's degree plus ~4+ years' relevant experience in SoC/IP design and integration.

Responsibilities

Deliver system-level integration of interconnect fabrics and collaborate across architecture, IP, and physical design teams.

• Partner with SoC architecture teams to define system-level chassis and interconnect requirements.
• Design and integrate high-performance NoC/interconnect fabrics to meet PPA targets.
• Drive integration of IP blocks into SoC platforms and ensure scalability across products.
• Collaborate with fabric IP teams to enhance or customize reusable components.
• Analyze trade-offs across performance, power, and area to inform architecture decisions.
• Work with physical design teams on floorplanning and implementation constraints.
• Support debug, validation, and silicon bring-up for integrated SoC platforms.
• Coordinate across global, cross-functional teams to deliver complex silicon solutions.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Proven SoC and/or IP design experience (required).
• Experience with Verilog/SystemVerilog and common verification/lint/CDC/RDC practices and timing constraints.
• Knowledge of AMBA protocols (CHI, AXI, AHB, APB) and high-speed interfaces such as PCIe/CXL.
• Experience analyzing power, performance, and area (PPA) trade-offs in designs.
• Familiarity with physical design constraints and floorplanning interactions.
• Strong systems thinking, ownership, collaboration, and communication skills; ability to mentor junior engineers.
• Nice-to-have: microarchitecture/IP systems experience, fabric design/integration (2+ years), deeper physical-design expertise.

Education Requirements

Minimum: Bachelor's degree in Electrical Engineering or a related technical field plus 6+ years of relevant experience, OR a Master's degree in Electrical Engineering or a related technical field plus 4+ years of relevant experience. (The posting did not list specific certifications or explicit "equivalent experience" language beyond these degree-plus-experience options.)

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.