SoC Infrastructure/NoC, Power & Performance Validation Engineer
QualcommJob Title
SoC Infrastructure/NoC, Power & Performance Validation Engineer
Role Summary
Join the SoC validation team responsible for pre-silicon emulation and post-silicon validation of on-chip interconnects, power and performance. The role works closely with architects, design, verification, and software teams to create validation content, exercise system-level scenarios, and analyze power/performance trade-offs.
Experience Level
Mid-level. Typical experience expectations vary by degree; examples in this posting show commonly 2+ years post-degree for Bachelor's, 1+ year for Master's, with other listings showing higher ranges.
Responsibilities
Validate SoC interconnects, power, and performance across pre- and post-silicon environments and produce test content, analysis, and debug artifacts.
- Develop validation plans and test content to exercise NoC/AXI/AHB interconnects for bandwidth, QoS, latency, and throughput coverage.
- Execute validation in emulation, FPGA, and silicon labs; analyze results and iterate on testcases and regressions.
- Measure and analyze power and performance; evaluate DVFS, dynamic clock/voltage scaling, and low-power modes.
- Debug system-level issues involving CPUs, DDR/memory subsystem, GPU, multimedia blocks, and peripherals.
- Implement drivers, kernel-level tests, and low-level software to exercise hardware features and capture state dumps.
- Work with verification, architecture, and software teams to resolve functional, performance, and power issues.
- Create performance/power trade-off reports and recommend design or software mitigations.
Requirements
Core technical skills and hands-on validation experience required.
- Deep understanding of interconnect architectures (NoC, AXI, AHB), upstream/downstream operations, and ability to write stress/tests for coverage.
- Expertise with FIFO designs and their performance/functional aspects.
- Knowledge of memory hierarchy, cache coherency/consistency, synchronization primitives, MTE, MPAM, and memory attributes.
- Familiarity with CPU, DDR concepts, GPU and multimedia system behavior.
- Experience with performance monitor architectures and debug architectures (state dumps, interaction with hardware debuggers).
- Proficient in embedded software development: C, C++, Python; experience writing drivers and test content; ability to debug low-level software/hardware issues.
- Practical experience using JTAG and kernel debuggers and other silicon debug tools.
- Strong logical problem-solving and structured program development skills with focus on power and performance validation.
- Experience in pre-silicon emulation and post-silicon bring-up and validation workflows.
- Nice-to-have: familiarity leveraging generative AI tools to optimize validation workflows and scripting/automation.
Education Requirements
Degree required: Bachelor's, Master's, or PhD in Science, Engineering, or a related field. The posting lists varying experience thresholds by degree (examples shown: Bachelor's with approximately 2+ to 5+ years, Master's with 1+ to 4+ years, PhD with ~3+ years of relevant ASIC design/validation/verification experience).
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
