SOC Infrastructure IP System HW Architect

Job Title

SOC Infrastructure IP System Hardware Architect

Role Summary

Define hardware architecture for SoC infrastructure IP (interconnect/NOC, system cache, system MMU, memory controllers and related blocks) for next-generation platforms, with emphasis on ARM-enabled systems. Work with architecture, RTL, verification and software teams to specify HW–SW interfaces, performance targets, and drive designs through RTL and silicon implementation.

Focus areas include architecture definition, trade-off analysis, performance modeling/validation, and ensuring features are firmware- and software-friendly.

Experience Level

Mid-level. Typical experience 3–7 years. The posting expects multiple years of systems or system-architecture experience (see Education Requirements for degree/experience combinations).

Responsibilities

Deliver SoC infrastructure hardware architectures and drive them through the implementation flow.

• Define HW architecture for interconnect (NOC), system cache, SMMU, memory controllers, and related infrastructure IP.
• Specify HW–SW interfaces, firmware APIs, and software-facing features.
• Perform system-level performance modeling, validation, and architecture trade-off analysis.
• Collaborate with SoC architects, RTL designers, verification, and system software teams to integrate IP into silicon.
• Define QoS, power/clocking, security, and debug capabilities and their software interfaces.
• Support RTL design activities and the complete silicon design flow including validation efforts.
• Communicate architecture decisions to stakeholders and adapt designs to changing product requirements.

Requirements

Must-have technical skills and experience.

• Hands-on experience with multi-die/chiplet architectures and die-to-die / chip-to-chip links.
• Knowledge of industry interconnect and I/O protocols.
• Deep understanding of SoC infrastructure IP hardware architecture (NOC, SMMU, caches).
• Experience with QoS, clocking, power management, security, and debug architectures and their software interfaces.
• Practical experience with HW–SW interfaces and firmware.
• Experience in performance modeling and system validation.
• Experience with RTL design and the complete silicon design flow.
• Experience in one or more system architecture technology areas (power systems, shared resource management, thermal/limits, hardware islands).
• Strong written and verbal communication skills; ability to react and adapt quickly.

Nice-to-have:

• Experience with platform system architectures (ARM, x86, RISC-V).
• Familiarity with industry standards such as PCIe, CXL, USB, UFS, MIPI, UCIe.
• Knowledge of ARM advanced technologies (security, RAS, MPAM, memory tagging).
• Experience with data science / machine learning or functional safety.

Education Requirements

Minimum: Bachelor's degree in Electrical Engineering, Computer Science, or a related field plus 4+ years of systems engineering or related experience; OR Master's degree plus 3+ years; OR PhD plus 2+ years. The posting additionally expects at least 2+ years of experience in one or more system architecture technology areas.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.