SoC Engineering Senior Manager

Job Title

SoC Engineering Senior Manager

Role Summary

Lead DFT architecture, implementation, integration, and verification for complex customer SoCs within the Systems Solutions Group. Drive test strategy and methodology from specification through tapeout, coordinate cross-functional delivery, and provide technical mentorship to DFT engineers.

Experience Level

Senior — typically 10+ years of hands-on SoC DFT experience.

Responsibilities

Accountable for DFT delivery and technical leadership on customer projects:

• Define and execute test strategies across scan/ATPG, memory BIST, logic BIST, and analog/PHY test insertion to meet coverage, cost, and yield targets.
• Lead DFT architecture, implementation, integration, and verification from specification through tapeout with customer design teams.
• Develop and apply DFT methodologies and guidelines using Synopsys EDA tools to solve customer problems on active projects.
• Drive post-silicon support: debug failures and refine production test patterns with test engineering and validation teams.
• Provide technical mentorship to DFT engineers and guide teams through integration and tradeoffs.
• Collaborate with RTL design, verification, physical design, and timing teams to ensure testability through signoff.
• Manage project deliverables, timelines, and quality for customer engagements.
• Capture reusable best practices and feed customer use-cases back to product teams to influence EDA/IP development.

Requirements

Key technical skills and proven experience required to perform the role.

• 10+ years of hands-on SoC DFT experience with deep expertise in scan and ATPG, memory BIST, logic BIST, and analog test.
• Proven track record leading DFT implementation on complex SoCs that have taped out and entered production.
• Deep understanding of the full SoC design flow: microarchitecture, RTL, verification, timing analysis, and physical implementation.
• Experience working with cross-functional teams to resolve testability and integration issues.
• Ability to drive technical decisions, articulate tradeoffs between test time, area, and coverage, and represent DFT positions to customers and stakeholders.

Nice-to-have:

• Experience with Synopsys DFT tools (TetraMAX, DFT Compiler, BIST Architect).
• Hands-on post-silicon debug and production test program refinement experience.
• Customer-facing experience delivering solutions across HPC, automotive, aerospace, or defense domains.

Education Requirements

Bachelor's or Master's degree in Electronics Engineering, Electrical Engineering, or a related technical field.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.