SOC Design Verification Engineer, Staff – Pre-Si/Post-Si Verification

Job Title

SOC Design Verification Engineer, Staff – Pre-Si/Post-Si Verification

Role Summary

Join the pre‑silicon and post‑silicon SoC verification team to plan and execute verification for next‑generation SoCs used in mobile, AI, HPC, and cloud products. Work spans pre‑silicon simulation, emulation/acceleration, and post‑silicon bring‑up and validation.

Senior/Staff engineers will own feature verification, lead complex debug across pre‑ and post‑silicon domains, mentor junior engineers, and drive methodology and automation improvements.

Experience Level

Senior (Staff) — typically 4+ years relevant verification, validation, or silicon bring‑up experience; engineer‑level hiring may be available at ~2+ years.

Responsibilities

Primary responsibilities across pre‑silicon and post‑silicon verification phases.

• Develop and execute verification plans for SoC, subsystem, and IP features.
• Build, enhance, and maintain SystemVerilog/UVM, C/C++, processor‑based, emulation, and acceleration environments.
• Create directed, constrained‑random, stress, performance, power, and system‑level tests; develop assertions and functional coverage models.
• Debug RTL, testbench, emulation, firmware, ATE/vector, and silicon bring‑up issues using logs, waveforms, traces, and hardware debug tools.
• Support post‑silicon validation, silicon characterization, ATE pattern debug, failure triage, and correlation between simulation/emulation and silicon.
• Drive coverage closure, regression health, bug tracking, and verification signoff using functional, code, and scenario coverage metrics.
• Participate in architecture, micro‑architecture, design, validation, and test‑plan reviews to capture verification and bring‑up requirements early.
• Mentor junior engineers and lead feature/subsystem verification from plan to closure (senior level).

Requirements

Must‑have technical skills and experience; preferred items listed separately.

• Strong experience with SystemVerilog, UVM, and assertion‑based verification; solid C/C++ skills for test and firmware interaction.
• Proven use of coverage‑driven verification, regression frameworks, and debug flows across simulation, emulation, and silicon correlation.
• Hands‑on RTL and testbench debug skills and experience diagnosing failures across hardware and software layers.
• Good understanding of computer architecture, digital design fundamentals, SoC integration, and system‑level use cases.
• Experience with post‑silicon concepts: bring‑up, ATE/vector debug, failure triage, and hardware/software interaction.
• Strong communication, collaboration, ownership, and problem‑solving skills; ability to lead cross‑functional technical efforts (senior level).
• Preferred automation skills: Python/Perl/shell for regression, debug, and data analysis (preferred).

Education Requirements

Bachelor's in Science or Engineering (e.g., Electrical Engineering, Computer Engineering, Computer Science) with ~2+ years relevant ASIC/SoC verification or validation experience; or Master's with ~1+ year; or PhD. Fields listed include electrical engineering, computer engineering, computer science, or related technical disciplines.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.