SOC Design Verification Engineer - Staff
QualcommJob Title
SOC Design Verification Engineer - Staff
Role Summary
Senior ASIC/SoC verification engineer responsible for defining, modeling, verifying, and validating complex SoC IP and subsystems. Works within ASIC/ASICS Engineering to deliver high-performance, low-power silicon by collaborating with architecture, hardware, software, product, and program teams.
Experience Level
Senior — typically an experienced engineer (see Education Requirements for degree and minimum years guidance). Preferred background includes significant ASIC design and verification experience.
Responsibilities
Accountable for technical design verification and delivery of complex IP/SoC blocks across the RTL-to-GDS flow and related toolchains.
- Define, model, design, verify, validate, implement, and document IP and SoC blocks.
- Create architectures, circuit specifications, logic designs, and system simulations from system requirements.
- Plan and execute verification strategies using industry EDA flows and verification methodologies.
- Evaluate design flow aspects from high-level design through synthesis, place-and-route, timing, and power analysis.
- Use RTL-to-GDS flows and custom design tools (e.g., Virtuoso) where applicable.
- Collaborate with cross-functional teams (software, hardware architecture, product, program management) to meet system requirements.
- Produce and review detailed technical documentation and verification reports.
- Provide guidance and mentorship to other engineers and coordinate with senior leadership on technical decisions.
Requirements
Key technical and professional requirements. Degree requirements and minimum years are listed in Education Requirements below.
- Proven ASIC design and verification experience, including development of verification environments and test plans.
- Familiarity with architecture and design tools and flows for digital and/or analog ASICs.
- Experience with scripting and programming for automation and verification (e.g., Python, Perl, Tcl, C/C++).
- Practical knowledge of design verification methods and industry-standard EDA tools.
- Hands-on experience with RTL-to-GDS flows and/or custom circuit design/layout tools (e.g., Virtuoso).
- Strong written and verbal communication skills; able to document complex technical work.
- Ability to work independently, prioritize tasks, and influence cross-functional decisions.
- Experience interacting with senior leadership or presenting technical tradeoffs to senior stakeholders.
Education Requirements
Minimum: Bachelor's degree in Science, Engineering, or related field plus 4+ years ASIC design/verification/validation/integration experience; OR Master's degree plus 3+ years; OR PhD plus 2+ years. Preferred: Master’s in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
