SoC Design Verification Engineer

Job Title

SoC Design Verification Engineer

Role Summary

Technical lead responsible for defining and executing end-to-end verification strategy for multiple testchips in the Hard IP division. Partner with architecture, design, structural design, IP, and post-silicon teams to drive functional signoff and predictable high-quality delivery.

Experience Level

Senior level — requires significant industry experience; posting specifies 10+ years of relevant design verification experience.

Responsibilities

Primary responsibilities include technical leadership of verification efforts and delivery of reusable verification collateral.

• Define verification strategy, technical standards, and execution model for critical blocks from planning through signoff.
• Lead development of reusable environments, testbenches, checkers, VIPs, and behavioral models.
• Drive functional signoff, coverage closure, and gate-level signoff across multiple verification components.
• Integrate simulation and formal verification into unified bug-hunting and coverage strategies; evaluate and adopt emerging and AI-driven methodologies.
• Collaborate with architecture, design, structural design, post-SI, and methodology teams to unblock issues and ensure on-time quality delivery.
• Mentor and develop verification engineers and establish team best practices.

Requirements

Must-have technical skills and experience; niceties indicated where appropriate.

• Must have: Extensive experience in subsystem and SoC-level design verification and debugging global functions such as debug, trace, clock, and power management.
• Must have: Deep practical knowledge of simulation and formal methods (UVM, SVA, ABV) and low-power verification techniques.
• Must have: Strong hands-on coding proficiency in SystemVerilog/UVM, C/C++, and Python; experience with build systems and EDA tool flows.
• Must have: Track record of developing configurable, reusable verification collateral and delivering silicon on schedule.
• Must have: Working familiarity with RTL and physical design constraints sufficient to review and contribute outside core DV tasks.
• Nice to have: Experience adopting AI-assisted verification workflows and developing verification automation tools.
• Nice to have: Prior leadership or mentoring experience in verification teams.

Education Requirements

BS or MS in Electrical Engineering, Computer Science, or a related field is specified; 10+ years of relevant experience is required. Equivalent practical experience may be considered.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.