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SOC Design Verification Engineer

Qualcomm
October 5, 2026
Full-time
On-site
San Diego, California, United States
$101,400 - $152,200 USD yearly
Verification Jobs, Level - Entry or Early Career

Job Title

SOC Design Verification Engineer

Role Summary

The SOC Design Verification Engineer contributes to the design, verification, and validation of ASIC/SoC IP blocks and subsystems. The role supports architecture definition, logic implementation verification, and handoff through synthesis, place-and-route, timing and power analysis.

Works within an ASIC engineering team and collaborates with cross-functional groups to meet system requirements and product schedules.

Experience Level

Entry-level / Early career. Preferred candidates have months of practical experience (examples in source show ~6+ months) with design and verification tools.

Responsibilities

Primary duties focus on applying ASIC and verification knowledge to support SoC/IP development and delivery.

  • Support definition, modeling, and verification of IP blocks and SoC-level features.
  • Assist in creation of architectures, circuit specifications, logic designs, and system simulations.
  • Contribute to implementation strategy covering synthesis, place-and-route, timing, and power analysis.
  • Execute flows and tools (e.g., RTL-to-GDS flow, EDA tools, Virtuoso) to validate design and implementation.
  • Write technical documentation for EDA/IP/ASIC projects and maintain design records.
  • Collaborate with team members to meet system requirements and customer needs.

Requirements

Required and preferred technical skills and experience (education details are summarized in Education Requirements below).

  • Must-have: Practical experience with design verification methods and related workflows.
  • Must-have: Experience using scripting tools and programming languages for automation and testbench development.
  • Must-have: Familiarity with architecture and design tools used in ASIC/SoC development.
  • Must-have: Ability to use EDA flows and tools (examples in source include RTL-to-GDS flow and Virtuoso).
  • Nice-to-have: Prior exposure to system-level simulation, timing and power analysis, or flow evaluation from design to layout.
  • Nice-to-have: Experience with Arm, C++, automation, or circuit/algorithm development as applied to verification.

Education Requirements

Required: Bachelor's degree in Science, Engineering, or a related field. Preferred: Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science. (These education items were taken from the job posting.)

Compensation range: $101,400 - $152,200 (annual).


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-10-05