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SoC Clocks Design Automation Engineer

NVIDIA
April 27, 2026
On-site
Tel Aviv-Yafo, Israel
Level - Mid-Career

Job Title

SoC Clocks Design Automation Engineer

Role Summary

Join the Networking Silicon team to develop and support clock-related design flows and methodologies for SoC and networking chips. The role focuses on improving automation, ensuring timing and performance requirements are met, and supporting SoC top-level integration and construction activities.

Experience Level

Level - Mid-level. At least 2 years of confirmed experience in SoC design, design automation, or methodology development.

Responsibilities

Primary responsibilities include developing and maintaining clock design flows and automation, collaborating with cross-functional teams, and supporting analysis and integration activities.

  • Develop and maintain design automation and methodologies for SoC and networking clock flows.
  • Collaborate with design, STA, and project teams to support timely and high-quality design closure.
  • Develop and improve SoC top-level automation scripts and flows using existing infrastructure and tools.
  • Support SoC integration and construction flow activities across multiple projects.
  • Assist in timing, power, and noise analysis to ensure efficient performance.

Requirements

Must-have technical skills and experience; a short list of preferred qualifications follows.

  • Experience in SoC design, design automation, or methodology development (see Experience Level for years).
  • Strong programming or scripting skills in at least one language (Python preferred; Perl, Tcl, or Make are advantages).
  • Understanding of physical design concepts including placement, routing, timing closure, and ECO implementation.
  • Familiarity with EDA tool flows for synthesis, place-and-route, and timing analysis (Synopsys or Cadence).
  • Strong analytical, problem-solving, and communication skills.

Nice-to-have:

  • Experience developing or maintaining SoC design or automation flows.
  • Knowledge of timing-related analysis (crosstalk, noise, delay).
  • Background in power or timing optimization techniques.
  • Demonstrated ability to work effectively across multi-functional teams and self-motivation to improve existing flows.

Education Requirements

B.Sc. or M.Sc. in Electrical Engineering or Computer Engineering, or relevant professional experience (equivalent practical experience accepted).


About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

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Date Posted: 2026-04-27