SoC Clock & Power Management Validation Engineer, Staff

Job Title

SoC Clock & Power Management Validation Engineer, Staff

Role Summary

Member of the System Validation & Emulation (SVE) team responsible for system-level validation of clock, power, reset, and power-management architectures on premium SoC platforms. The role spans pre-silicon and post-silicon phases, developing bare-metal validation content, automation, and debug flows to deliver production-quality silicon for AI/HPC and mobile platforms.

Experience Level

Senior - typically 5+ years of relevant SoC validation, embedded systems, or software experience. Advanced degrees may reduce the required years of experience per the minimum qualifications.

Responsibilities

Deliver and scale end-to-end validation for SoC clock and power subsystems across pre- and post-silicon stages.

• Own E2E bare-metal framework validation for SoC clock and power architectures.
• Plan validation: analyze design changes and define standalone and system-level test scenarios.
• Create and document test strategies, test plans, and dependencies; conduct reviews with architects, designers, verification, and firmware teams.
• Develop scalable device drivers and tests in C; build standalone and system tests.
• Automate development, execution, and inference using Python, Perl, and shell scripts.
• Debug complex pre-silicon and post-silicon issues; lead root-cause analysis with cross-functional teams.
• Review validation platform schematics to ensure post-silicon debug support and coordinate with platform design teams.
• Use lab instruments (multimeter, oscilloscope, logic analyzer) and debug tools to validate and characterize power/clock behavior.
• Collaborate effectively with distributed teams across time zones.

Requirements

Must-have and preferred technical skills for successful execution of the role.

Must-have:

• 5+ years relevant experience in SoC validation, embedded systems, or associated software development.
• Prior experience in clock and power validation.
• Proficient in C and Python.
• Experience using lab instruments (multimeter, oscilloscope, logic analyzer).
• Familiarity with debug tools (JTAG) and ARM-based SoC debug methodologies.
• Strong analytical and debugging skills.

Nice-to-have:

• Experience with cross-compilers, linkers, and makefiles.
• Understanding of coherency and concurrency in modern SoC architecture.
• PMIC and rail-power validation experience, including power measurement setups.
• Pre-silicon validation and FPGA-based emulation experience.
• Knowledge of RTL/HDLs (Verilog/SystemVerilog).
• Experience working in cross-functional matrix teams.

Education Requirements

Bachelor's degree in Engineering (e.g., electronics, computer engineering) or Science and typically 4+ years relevant ASIC/validation experience; OR Master's degree in Science/Engineering and typically 3+ years; OR PhD in Science/Engineering and typically 2+ years. Equivalent practical experience may be considered where specified.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.