SMTS Process Engineer, RET OPC

Job Title

SMTS Process Engineer, RET OPC

Role Summary

Senior technical staff role within Advanced Mask Development focused on developing and optimizing Resolution Enhancement Techniques (RET) and Optical Proximity Correction (OPC) to enable high-fidelity wafer patterning for advanced memory products. The role partners with R&D and manufacturing teams to improve tapeout methodologies, reticle solutions, and manufacturing yield.

Experience Level

Senior — Senior Member of Technical Staff. The position expects extensive semiconductor industry experience (see Education Requirements for documented years guidance).

Responsibilities

Key responsibilities include driving technical projects, delivering RET/OPC solutions, and collaborating across engineering disciplines.

• Lead and manage multiple sophisticated projects in mask development, lithography optimization, and tapeout flow improvements.
• Develop, optimize, and implement RET and OPC methodologies to improve pattern fidelity, manufacturability, and yield.
• Investigate and deploy new methodologies, software capabilities, and process enhancements to improve lithography performance.
• Analyze patterning issues across R&D and manufacturing, identify root causes, and implement corrective actions.
• Provide technical direction and communicate requirements to internal and external stakeholders.
• Drive adoption of AI-enabled engineering practices to automate analyses and accelerate innovation.
• Mentor junior engineers and promote knowledge sharing and technical best practices.

Requirements

Must-have technical skills and experience.

• Hands-on experience developing and applying RET/OPC methodologies and reticle solutions to improve semiconductor patterning.
• Strong understanding of EUV lithography fundamentals, including optics, diffraction, phase-shift concepts, resist behavior, and advanced patterning techniques.
• Experience with lithography simulation tools such as Sentaurus Litho, ProLith, or similar platforms.
• Proven ability to collaborate across multiple engineering disciplines, with strong verbal and written communication skills.
• Demonstrated problem-solving skills in both technology development and high-volume manufacturing environments.
• Experience mentoring or coaching junior engineers is desirable.
• Nice-to-have: familiarity with EDA tools (Synopsys, Siemens, Cadence, Brion) and programming/scripting (Python, Perl, TCL, C/C++).

Education Requirements

Bachelor's degree in Electrical Engineering, Materials Science, Physics, Chemical Engineering, or a related technical field is required. The posting specifies substantial industry experience (posting lists 12+ years) in semiconductor RET/OPC/lithography work. MS or PhD in Electrical Engineering or Materials Science is preferred.

About the Company

Company: Micron Technology

Headquarters: Boise, Idaho, USA

Micron Technology is a global leader in memory and storage solutions, dedicated to transforming how the world uses information. The company offers a diverse portfolio of high-performance DRAM, NAND, and NOR memory products under the Micron and Crucial brands. With a commitment to customer focus and technological innovation, Micron drives advancements in artificial intelligence, 5G, and other data-centric applications, empowering users to learn, communicate, and progress.