Silicon Validation Engineer 5

Job Title

Silicon Validation Engineer 5

Role Summary

Senior engineer on the Silicon Engineering team responsible for validation and characterization of FPGA silicon building blocks from silicon arrival through product release. Work includes test planning, board- and silicon-level bring-up, validation, debugging, data analysis, and cross-functional coordination.

This role focuses on high-speed interfaces (SERDES, memory, DPHY, I/O), RTL test logic, test automation, and device characterization using lab instrumentation.

Experience Level

Senior — the posting specifies 8+ years of relevant experience.

Responsibilities

Key responsibilities include:

• Validate and characterize FPGA IPs and subsystems (SERDES, memory, DPHY, PLL, DSP, fabric, I/O) from silicon arrival to production release.
• Develop validation and characterization plans, bench hardware setups, and software tools.
• Design and implement RTL test logic for validation and characterization.
• Lead new-silicon bring-up, debug functionality and performance, collect and analyze characterization data for datasheets.
• Perform signal integrity and high-speed board bring-up and debug.
• Develop test automation and scripts to support validation and regression testing.
• Coordinate with design, verification, manufacturing, test, quality, and applications teams during product release.
• Support customer issues and post-release problem resolution as needed.

Requirements

Must-have skills and experience:

• 8+ years of experience in silicon validation, device characterization, or related roles.
• Proven ability to lead and act as technical lead for small teams.
• Expertise in high-speed SerDes characterization and protocol compliance testing (PCIe, Ethernet, SDI, CoaXpress, JESD204, MIPI D-PHY, MIPI CSI/DSI-2, USB, DisplayPort/HDMI, etc.).
• Experience with high-speed board design and signal integrity evaluation and debugging.
• Proficiency in hardware description languages (Verilog/VHDL) and FPGA toolflows for test/demo platforms.
• Test automation and scripting experience (e.g., Python, Perl).
• Familiarity with statistical analysis and tools (e.g., JMP, R) for characterization data.
• Operational experience with bench instrumentation: BERT, VNA, oscilloscopes, protocol exercisers/analyzers.
• Exposure to FPGA emulation/prototyping workflows.
• Strong written and verbal communication, problem-solving, and debugging skills; self-motivated and proactive.

Education Requirements

Electrical Engineering degree specified (level not stated). The posting references an Electrical Engineering degree aligned with a career in silicon design validation.

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.