Silicon Packaging Design Engineer
Design and deliver substrate/package layouts from concept through tapeout, optimizing for performance, manufacturability, and cost. Work within the Foundry Technology Manufacturing organization and partner with silicon, hardware, and manufacturing teams to ensure package-board interfaces meet product requirements.
Role follows Intel's hybrid work model with time split between the assigned Intel site (Penang) and off-site work.
Mid-level β typically candidates with roughly 3β7 years of relevant substrate/package design experience. The team expects demonstrated hands-on experience in substrate layout, routing, and design-rule resolution.
Primary responsibilities include end-to-end substrate design, tradeoff analysis, and cross-functional collaboration.
Must-have technical skills and experience; preferred items listed separately.
Nice-to-have:
Bachelor's degree in Electrical Engineering, Mechanical Engineering, Electronics, or a related field is cited as the baseline. The posting specifies experience tradeoffs: typically 4+ years with a Bachelor's, ~3 years with a Master's, and applicants with a PhD may meet requirements with no prior industry experience. Fields noted: Electrical Engineering, Mechanical Engineering, Electronics, or related technical disciplines.
Company: Intel Corporation
Headquarters: Santa Clara, California, USA
Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.
