Silicon Packaging Design Architect

Job Title

Silicon Packaging Design Architect

Role Summary

Senior engineer responsible for end-to-end silicon package architecture, delivering physical, electrical, thermal, mechanical, and cost-optimized packaging solutions. Works with silicon, hardware, package, and EDA partners to move designs into production and improve packaging standards and processes.

Experience Level

Senior. Typical background: 6+ years with a Bachelor's, 4+ years with a Master's, or 2+ years with a Ph.D.; many roles prefer 10+ years of relevant experience.

Responsibilities

Accountabilities include defining package architecture, driving tradeoffs, and enabling production-ready designs.

• Translate product requirements into detailed package architecture specifications.
• Drive technology tradeoff decisions to meet electrical, mechanical, thermal, and reliability targets.
• Collaborate with silicon, hardware, package, and board teams to resolve design and integration issues.
• Oversee end-to-end package development, including procedures and quality improvements.
• Troubleshoot materials, assembly, and process issues and propose cost-effective solutions.
• Implement co-design strategies between silicon and board design to optimize performance and cost.
• Work with EDA partners to advance package design tools and methodologies.

Requirements

Must-have technical skills and experience; preferred items listed separately.

• Must-have: 2+ years hands-on experience in semiconductor fabrication, chip assembly, or packaging.
• Must-have: Experience with electromagnetic simulation and analysis tools (examples: Mentor, Cadence, SPICE, Ansys or similar).
• Must-have: Experience with package/PCB toolchains such as Cadence Allegro (APD/SiP, PCB Editor, Sigrity) and/or Mentor Xpedition (PCB Layout/XPD, Designer, HyperLynx).
• Must-have: In-depth knowledge of assembly processes, test methodologies, and characterization techniques.
• Must-have: Strong analytical, communication, and organizational skills; ability to manage multiple priorities.
• Nice-to-have: Extensive (e.g., 10+ year) experience in package, PCB design, or IC digital design and proven troubleshooting/optimization track record.
• Nice-to-have: Experience making technology trade-offs to balance cost, performance, and quality; prior collaboration across multidisciplinary teams.

Education Requirements

Options accepted: Bachelor's degree in electrical engineering, mechanical engineering, chemical engineering, materials science, or other STEM field (with 6+ years relevant experience); Master's in those fields (with 4+ years experience); or Ph.D. in those fields (with 2+ years experience). Education may be complemented or partially substituted by equivalent industry experience, internships, or academic research.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.