Silicon Package Design Engineer

Job Title

Silicon Package Design Engineer

Role Summary

As a Silicon Package Design Engineer within the Assembly and Test Technology Development (ATTD) Design group, you will develop substrate and package physical layouts, perform fit and routing studies, and work with electrical engineers and customers to meet electrical and manufacturability requirements.

This role focuses on optimizing silicon-package-board performance, verification, and documentation and is eligible for Intel's hybrid work model based in Bangalore.

Experience Level

Mid-level. Typical candidates have 1–6 years of hands-on experience in silicon packaging design or equivalent project/internship experience.

Responsibilities

Primary responsibilities include physical layout, verification, and cross-functional collaboration to deliver manufacturable package designs.

• Develop physical layout designs for silicon packages, assembly test chips, and EMIB technologies.
• Perform substrate fit and routing studies; plan signal routing and power-grid placement.
• Create and place bump patterns according to design rules.
• Collaborate with customers and electrical engineers to optimize signal integrity and power delivery.
• Execute layout verification: connectivity checks, DRC, electromigration analysis, and routing checks.
• Troubleshoot design and methodology issues related to layout tools and workflows.
• Document design processes and maintain product lifecycle management collateral.

Requirements

Must-have technical skills and preferred attributes.

• Must-have: Proficiency with EDA tools for package/PCB design (Cadence or Siemens).
• Must-have: Programming/scripting familiarity (Python, Perl, SKILL) and comfortable working in Linux.
• Must-have: Strong understanding of electrical field theory and electronic fundamentals.
• Must-have: Experience with layout verification workflows (DRC, connectivity validation, electromigration checks).
• Must-have: Ability to collaborate with cross-functional teams and document technical work.
• Nice-to-have: Excellent written/verbal communication, attention to detail, and customer-oriented mindset.

Education Requirements

Bachelor's degree in Electrical Engineering, Electronics Engineering, Computer Engineering, or another STEM-related field with 1–6 years of hands-on silicon packaging design experience (including academic projects, internships, coursework, or training), OR a Master's degree in a related field with no prior professional experience. Equivalent practical experience is acceptable. No specific certifications were listed.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.