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Signal Integrity Validation Internship (Summer 2025)

Cadence Design Systems
April 30, 2026
Internship
On-site
San Jose, California, United States
$31.63 - $58.75 USD hourly
Test Engineering Jobs, Level - Entry or Early Career

Job Title

Signal Integrity Validation Internship (Summer 2025)

Role Summary

Internship on the Signal Integrity (SI) team within Cadence's Silicon Solutions Group (SSG). The intern will support modeling, simulation, measurement, and correlation activities for high-speed interface interconnects and work with cross-functional teams including silicon, package, board, and electrical validation engineers.

The role focuses on hands-on simulation and lab measurement to validate interconnect and interface performance and contribute to design guideline and tool/methodology development.

Experience Level

Entry-level / Internship — targeted at students (master's-level preferred). This is a student internship role; no senior-level experience required.

Responsibilities

The intern will participate in SI validation tasks and support both simulation and lab measurement workflows.

  • Model and simulate high-speed interconnects/channels (frequency- and time-domain).
  • Perform lab measurements and debugging (TDR, VNA, pattern generators, error detectors) and correlate results to simulations.
  • Work with silicon, package, board, and electrical validation teams to support interconnect and interface performance requirements.
  • Contribute to development of package and platform design guidelines and review board/package designs.
  • Define and evaluate circuit design features needed to meet interconnect performance targets.
  • Create signal measurement test plans and analyze measurement results; update models as required.
  • Support signal integrity tool and methodology development.

Requirements

Core technical skills and hands-on experience required or strongly preferred for effective contribution.

Must-have:

  • Understanding of electromagnetic principles for digital signal integrity.
  • Experience with signal integrity or electromagnetic simulation/analysis tools (examples: Ansys HFSS, Designer, CST Microwave).
  • Experience with signal integrity measurements and debugging using equipment such as TDR, VNA, pattern generators, and error detectors.
  • Knowledge of frequency-domain and time-domain component and circuit characterization, and of test and calibration methods.

Nice-to-have:

  • Experience with Cadence tools, MATLAB, ADS, and HSPICE.
  • Experience in component design and applying high-speed cables/connectors in communications equipment.

Education Requirements

Currently enrolled in an MSEE (Master of Science in Electrical Engineering) or equivalent program (student status required). The posting specifies "Currently enrolled in MSEE or equivalent."


About the Company

Company: Cadence Design Systems

Headquarters: San Jose, California, USA

Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.

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Date Posted: 2026-04-30