Server CPU Clock Physical Design Engineer (Staff) — Cambridge, UK

Job Title

Server CPU Clock Physical Design Engineer (Staff) — Cambridge, UK

Role Summary

Join the Nuvia Data Center CPU team in Cambridge to define, implement, and optimize clock generation and distribution for high-frequency, power-efficient server CPUs. The role spans architecture through silicon correlation and requires close collaboration with microarchitecture, RTL, circuit, CAD, and physical design teams.

Experience Level

Senior / Staff level. The role expects an experienced engineer able to lead technical decisions; typical experience guidance appears in the Education Requirements section.

Responsibilities

Deliver clocking architecture, methodologies, and implementations for next-generation server CPUs and support signoff-ready physical designs.

• Define and drive clock generation and distribution methodology for data-center CPU designs.
• Design and optimize low-skew, low-power clock networks (H-trees, clock mesh, clock spines).
• Collaborate with microarchitecture, RTL, circuit, CAD, block-level and top-level physical design teams to implement clock requirements.
• Use SPICE and circuit-level analysis to validate clock circuits and paths across process, voltage, and temperature (PVT) corners.
• Analyse and debug clock-related timing, power, noise, and variation issues across modes and corners.
• Provide guidance to physical design teams on clocking fixes, optimizations, and signoff risks.
• Align PLL, jitter, uncertainty, and signoff methodology with timing, power, and implementation teams.
• Develop, document, and improve clock construction, analysis, and validation flows for future designs.
• At Staff level: provide technical leadership, mentor engineers, and drive resolution of critical clocking challenges.

Requirements

Must-have technical skills and experience to perform the role; preferred skills useful but not mandatory.

• Must have: Proven experience constructing and analysing low-skew, low-power clock generation and distribution networks.
• Hands-on experience with clock distribution structures and methodologies such as H-tree, clock mesh, and clock spines.
• Deep understanding of CTS, clock balancing, insertion delay, skew optimization, useful skew, clock latency trade-offs, and clock power reduction techniques.
• Proficiency with SPICE simulation and circuit-level analysis for clock-path validation and electrical verification.
• Strong knowledge of static timing analysis and signoff-quality timing (jitter, uncertainty, OCV/AOCV/POCV, setup/hold closure).
• Experience with industry-standard EDA implementation and signoff flows for physical design, timing, power analysis, and physical verification.
• Ability to debug complex clocking issues spanning implementation, timing, power, noise, variation, and circuit domains.
• Strong communication skills and proven ability to work with global cross-functional engineering teams.

• Nice to have: Experience defining/deploying clock methodology across multiple designs or technology generations.
• Experience in advanced process nodes (7nm and below) and high-frequency CPU clocking.
• Familiarity with PLL specifications, jitter budgeting/measurement, and clock source modelling.
• Experience with power-aware clocking strategies (clock gating, resonant/mesh techniques) and clock power optimization.
• Multi-corner multi-mode timing closure and variation-aware implementation experience.
• Experience developing automation or analysis flows using TCL, Python, Perl, or similar scripting languages.
• Demonstrated technical leadership or methodology ownership (expected for Staff-level candidates).

Education Requirements

Degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field is preferred: Bachelor's, Master's, or PhD. Qualcomm provides experience-based alternatives: typical hiring guidance is Bachelor's +4 years ASIC/design experience, Master's +3 years, or PhD +2 years; equivalent practical experience will also be considered.

About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.