SerDes System Architecture Engineer
Join the system architecture team to develop and validate analog and mixed-signal SerDes models used for high-speed IC design (up to 64 Gbps, NRZ and PAM4). The role focuses on model development, automation of extraction/correlation, channel simulation, and collaboration with R&D to ensure designs meet performance and reliability targets.
Entry-level (Junior). Posting describes a junior engineer; no specific years-of-experience stated.
Primary responsibilities include building and validating models, automating processes, and supporting design verification prior to tapeout.
Must-have technical skills and attributes; a few preferred skills listed separately.
M.Sc. or Ph.D. degree in Electrical Engineering (specified). No explicit mention of equivalent practical-experience alternatives.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
