Serdes PHY Analog Design Engineer
QualcommJob Title
Serdes PHY Analog Design Engineer
Role Summary
Hands-on analog circuit design role on the BDC SerDes mixed-signal team responsible for delivering high-speed SerDes PHYs for SoCs. The position focuses on low-power analog building blocks, PLLs, and end-to-end PHY delivery from schematic through post-layout verification to post-silicon bring-up.
Experience Level
Senior — typically 8+ years of relevant analog/mixed-signal design experience, with prior PHY lead or equivalent responsibilities preferred.
Responsibilities
Core responsibilities include detailed analog design, verification, and integration of SerDes PHYs and supporting blocks.
- Design analog building blocks: LDOs, high-speed TX/RX (equalizer, sampler, PI, deserializer), bias and references.
- Design and analyze analog and digital PLLs for frequency synthesis and SerDes (charge pump, loop filter, VCO/DCO, PFD/TDC, high-speed dividers).
- Perform schematic-to-post-layout verification, integration sign-off, and support post-silicon bring-up.
- Model PLL loop dynamics and jitter sources (RJ & DJ) and apply results to circuit tuning.
- Collaborate with RTL, design documentation (DD), physical design (PD), design verification (DV), SoC verification, and post-silicon teams during integration.
- Lead PHY integration activities and coordinate with manufacturing/debug teams (ATE, HSIO, SVE, CE) when applicable.
Requirements
Must-have technical skills and experience to perform the role.
- Proven analog circuit design experience for high-speed SerDes PHYs and related building blocks.
- Experience with SPICE simulators and Cadence Virtuoso (and related tools such as adexl).
- Practical post-silicon bring-up and debug experience.
- Understanding of advanced FinFET process effects on design and layout.
- Scripting experience (Shell, Perl, or Python) for automation of design and verification tasks.
- Strong communication and cross-team collaboration skills; able to work with global teams.
- For lead roles: prior PHY lead responsibilities including PHY-to-SoC integration and post-silicon coordination.
- Nice-to-have: experience with peripheral PHY protocols (USB, UFS, PCIe) and mixed-signal design background.
Education Requirements
Bachelor's, Master’s, or PhD in Computer Science, Electrical/Electronics Engineering, Electronics, or a related engineering field; or equivalent practical experience. (Minimum experience requirements vary by degree per company policy.)
About the Company
Company: Qualcomm
Headquarters: San Diego, California, United States
Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.
