SerDes Analog Behavioral Modeling and Validation Engineer
The role involves collaborating with analog circuit teams to develop and refine behavioral models for SerDes analog blocks, ensuring models accurately reflect circuit behavior. The engineer will be part of a skilled, cross-functional team focused on analog design, modeling, and verification for high-performance connectivity IP.
Mid-level, requiring 5+ years of experience in analog design and simulation.
The engineer will be responsible for the following:
Candidates must meet the following requirements:
BSc/MSc/PhD in Electrical/Computer Engineering.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
