Senior Verification Engineer

Job Title

Senior Verification Engineer

Role Summary

As a Senior Verification Engineer on the ASIC & Networking team you will lead functional verification for TeraWave's in-house silicon program, covering IP, subsystem, and full-SoC levels. You will define verification strategy and methodology, build verification infrastructure and AI-enabled verification tools, and own verification deliverables through sign-off.

The program targets a high-throughput modem and a DSP-intensive beamformer with first tapeout targeted for 2027.

Experience Level

Senior-level. Minimum five years of professional experience in ASIC or SoC functional verification is required.

Responsibilities

Drive verification planning, execution, and infrastructure across IP, subsystem, and SoC scope.

• Own verification planning and execution for complex blocks and subsystems from test plan through sign-off.
• Translate specifications into verification strategies, measurable coverage goals, and risk identification.
• Select and apply methods including constrained-random simulation, formal analysis, and directed testing.
• Develop verification environments, reference models, scoreboards, protocol monitors, coverage components, and assertions.
• Drive coverage closure, regression health, and sign-off readiness; build CI/regression systems and reuse strategy.
• Apply and develop AI-assisted capabilities for stimulus generation, regression triage, and coverage analytics.
• Review testbench architecture, improve debug methodology, and mentor junior verification engineers.

Requirements

Key must-have skills and relevant preferred experience.

• Must-have: Minimum five years of professional ASIC/SoC functional verification experience.
• Hands-on experience with SystemVerilog and UVM, or formal testbench development and maintenance.
• Experience with metric-driven verification: assertions, functional coverage, and verification planning.
• Proven experience verifying complex digital control and datapath logic, with RTL and system-level debug.
• Experience building verification infrastructure, automated regression, and CI systems.

Preferred (nice-to-have):

• Background in wireless, modem/baseband, DSP, or space-based communications.
• Experience with LDPC/FEC, framing, beamforming logic, or fixed-point reference models.
• Formal verification on production silicon (connectivity, register maps, CDC, security properties).
• Interconnect/NoC verification (performance, bandwidth, QoS, deadlock analysis) and fault-tolerance features (ECC, redundancy, fault injection).
• Experience developing C-based or portable stimulus for SoC/firmware-driven scenarios and applying AI/ML/LLM tooling to verification workflows.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, or a related field, or equivalent practical experience.

About the Company

Company: Blue Origin

Headquarters: Kent, Washington, United States

Blue Origin is an American aerospace company developing technologies for spaceflight, including reusable launch vehicles, orbital and suborbital systems, and space infrastructure for commercial and government customers.