Senior UVM Digital Verification Engineer

Job Title

Senior UVM Digital Verification Engineer

Role Summary

The Senior UVM Digital Verification Engineer will design and execute verification strategies for FPGA and ASIC digital and mixed-signal designs across embedded security, cryptography, signal/image processing, navigation, and communications domains. The role sits on Draper’s Digital Design Team and focuses on verification architecture, testbench development, and delivery of thorough verification closure.

Experience Level

Senior — typically requires 5–7 years of relevant systems analysis, verification, or related engineering experience.

Responsibilities

Accountable for end-to-end verification activities and for guiding small teams toward program goals.

• Lead development and execution of UVM-based verification plans for block- and chip-level verification.
• Develop UVM agents, instantiate VIPs for industry-standard buses, and build constrained-random testbenches.
• Author and run verification plans; implement covergroups and drive code/functional coverage to closure.
• Use formal analysis tools and integrate formal results into verification closure where applicable.
• Debug simulations and collaborate with RTL designers to resolve functional and simulation issues.
• Identify system-level technical risks and develop mitigation strategies.
• Mentor junior engineers and lead small teams; conduct code reviews and provide technical feedback.
• Automate verification flows using scripting and run flows in a Linux environment.

Requirements

Must-have technical skills and experience for immediate contribution.

• Fluency in SystemVerilog, including SVA; recent hands-on experience with UVM/UVMF.
• Experience with at least one major industry simulator (Questa, Xcelium, VCS).
• Strong background in constrained-random testing and coverage-driven verification.
• Experience with formal analysis tools and methodologies.
• Familiarity with IEEE bus standards and experience with DDR3/DDR4 and AMBA AXI protocols.
• Scripting experience (Python, Perl, Bash) and ability to work in Linux build/test environments.
• Strong analytical, written, and verbal communication skills; attention to detail and time management.
• Ability to obtain and maintain a government security clearance.
• Demonstrated ability to lead and mentor small teams and to adapt verification approaches to changing program requirements.

Education Requirements

Bachelor's degree in Aerospace, Electrical, Mechanical, or another relevant engineering field is required. A Master’s degree is preferred.

About the Company

Company: Draper

Headquarters: Cambridge, MA, United States

Draper is an independent, nonprofit research and development organization based in Cambridge, Massachusetts. With over 2,000 employees, Draper develops advanced technologies in defense, space, biomedical engineering, and other national-security and commercial domains through multidisciplinary teams of engineers and scientists.