Senior Test Engineer

Job Title

Senior Test Engineer

Role Summary

Design and deliver test infrastructure and automated test programs for wafer‑level and package‑level RF‑MEMS devices. The role leads validation strategy, debugs test systems, and transitions test solutions into production while working with RF design, MEMS, process, reliability, and product teams.

Compensation range (reported): $115,600 - $150,500 (California Bay Area).

Experience Level

Senior — typically requires 5+ years of semiconductor test engineering, RF test, MEMS test, or mixed‑signal ATE development.

Responsibilities

Primary responsibilities include building test systems, creating automated test software, defining validation plans, and supporting production ramp.

• Build and qualify test infrastructure for wafer‑level and package‑level RF‑MEMS testing (probe‑station setups, RF/DC benches, automated test equipment).
• Develop and maintain automated test programs using LabVIEW, NI TestStand, and C# ensuring scalability and production readiness.
• Define validation strategy: test plans, characterization matrices, DOE structures, and qualification flows.
• Debug test programs, instrument communication, and hardware setups to resolve measurement anomalies and repeatability issues.
• Design, qualify, and maintain probe cards for wafer‑level testing.
• Support manufacturing ramp and transition test programs and hardware into production to improve throughput.
• Collaborate cross‑functionally with RF design, MEMS design, process engineering, reliability, and product engineering teams.

Requirements

Essential technical skills, experience, and work authorization expectations. Education credentials are summarized separately below.

• Must-have: Strong experience with LabVIEW for custom measurement routines, NI TestStand for sequencing and production deployment, and C# for instrument drivers and automation.
• Must-have: Hands‑on wafer‑level RF/DC testing experience, including probe‑station workflows and tester calibration.
• Must-have: Ability to read and interpret schematics and perform hands‑on debugging of test programs, hardware bring‑up, and instrument communication.
• Must-have: Experience with probe card design, qualification, and maintenance; experience with motherboard/PCB design or layout including RF routing and signal integrity.
• Must-have: Proven experience supporting both R&D characterization and production test environments and ownership of test infrastructure or validation strategy.
• Preferred / Nice-to-have: Prior experience with RF‑MEMS devices, mixed‑signal ATE development, and DOE-based characterization.
• The position is not eligible for visa sponsorship; candidates must be authorized to work in the United States.

Education Requirements

BS, MS, or PhD in Electrical Engineering, Computer Science, or a related field (as listed in the posting).

About the Company

Company: Qorvo

Headquarters: Greensboro, NC, US

Qorvo supplies innovative semiconductor solutions that enhance connectivity and power for a variety of applications, including consumer electronics, automotive, and healthcare. With a focus on RF and power solutions, Qorvo combines technology leadership and global manufacturing to address complex challenges in fast-growing industries. Their commitment to excellence and innovation drives them to shape the future of wireless communications.