Senior Technical Staff Engineer - SOC Verification
MicrochipJob Title
Senior Technical Staff Engineer - SOC Verification
Role Summary
Technical lead for SoC and microcontroller verification within the dsPIC Microcontroller Business Unit. Responsible for architecting and executing verification strategies across block, subsystem, and full-chip levels to achieve first-pass silicon success.
Works cross-functionally with architecture, design, firmware, and validation teams; mentors engineers and drives verification methodology, automation, and best practices.
Experience Level
Senior - requires 12+ years of experience in digital design verification (SoC/MCU product tape-outs).
Responsibilities
Own and drive SoC-level verification from specification through tape-out and closure.
- Define and execute comprehensive verification plans for complex MCU/SoC designs.
- Develop SystemVerilog/UVM testbenches, reusable components, and stimulus.
- Verify digital IP, subsystems, and full-chip integrations at RTL and gate level.
- Establish and track coverage goals: functional, code, assertion, and safety coverage.
- Develop and execute functional safety verification strategies and fault-injection tests.
- Debug full-chip issues spanning architecture, RTL, firmware interaction, and verification infrastructure.
- Promote verification best practices, automation frameworks, and reusable methodologies.
- Mentor and provide technical leadership to junior engineers and peers.
- Drive adoption of advanced techniques including formal methods and AI-assisted workflows.
Requirements
Must-have skills and experience for immediate impact.
- 12+ years of digital design verification experience with proven SoC or MCU tape-out results.
- Strong expertise in SystemVerilog and UVM; coverage-driven verification methodologies.
- Hands-on experience verifying SoCs with ARM or comparable embedded processors.
- Deep understanding of AMBA protocols (AXI, AHB, APB).
- Experience creating verification plans, testbenches, checkers, assertions, and coverage models.
- Strong debugging skills across RTL, simulation regressions, and full-chip integration.
- Proven ability to influence technical decisions and collaborate across distributed teams.
- Excellent communication and technical leadership abilities.
Nice-to-have (preferred):
- Formal verification experience (e.g., JasperGold, VC Formal).
- Gate-level simulation, low-power/power-aware verification experience.
- Familiarity with functional safety standards and ISO 26262 approaches.
- Experience with fault-injection simulations and safety coverage analysis.
- Verification automation and scripting (Python, Perl, etc.) and experience leveraging AI-assisted tools.
- Post-silicon validation experience and mixed-signal/AMS exposure.
- Prior technical leadership or methodology/automation initiative ownership.
Education Requirements
BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline.
About the Company
Company: Microchip
Headquarters: Chandler, Arizona, USA
Microchip is a leading semiconductor company focused on developing innovative solutions to enhance the human experience. With a commitment to empowering innovation, Microchip prioritizes the value of its employees by fostering a culture that supports their growth and contributions.
