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Senior System Integration and Validation Engineer

NVIDIA
September 11, 2026
Full-time
Remote friendly (Santa Clara, California, United States)
Worldwide
$168,000 - $310,500 USD yearly
Test Engineering Jobs, Level - Senior

Job Title

Senior System Integration and Validation Engineer

Role Summary

Join the Silicon Co-Design Group to lead end-to-end system validation and cross-functional debug for flagship GPU/SoC programs. This role drives validation coverage, manages crisis debug task forces, and builds AI-enabled validation workflows that materially reduce escapes and improve ramp confidence.

Experience Level

Senior - typically requires 8+ years of post-silicon validation, system integration, or platform debug experience.

Responsibilities

Lead system validation, debug, and automation across silicon, board, and software boundaries; translate technical risk into decision-ready options.

  • Own end-to-end system validation for GPU, SoC, and platform programs: feature checks, PVT stress, system-stress campaigns, and multi-unit fleet testing.
  • Lead root-cause debug of cross-stack issues (logic, SI, PI, power delivery, firmware, software) and drive productized fixes and reusable workarounds.
  • Develop test plans, scripts, and automation ahead of physical builds to translate architecture and boot flows into executable coverage.
  • Design and deploy AI-enabled debug and validation workflows with explicit guardrails, regressions, and measurable impact on cycle time or escape rate.
  • Translate complex silicon and system risks into concise options for technical and executive audiences.
  • Partner with global teams across design, DFT, firmware, software, manufacturing, and platform engineering; lead crisis-mode debug task forces and capture reusable learnings.

Requirements

Must-have technical skills, demonstrated outcomes, and leadership in post-silicon validation.

  • 8+ years of post-silicon validation, system integration, or platform debug experience on shipped GPU, CPU, or SoC products.
  • Hands-on debug depth across silicon, board, and software boundaries: strong EE fundamentals in SI/PI, power delivery, thermal, and familiarity with high-speed I/O behavior.
  • Proven track record of taking ambiguous, multi-team failures to root cause and delivering productized fixes; examples of owning decision points in crisis projects.
  • Experience building or scaling AI-driven validation workflows (beyond personal use) with adoption metrics and explicit guardrails for correctness and false-positive handling.
  • Ability to lead cross-functional teams and communicate risk and remediation options to technical and executive stakeholders.

Nice-to-have:

  • Experience building reusable validation methodologies, debug playbooks, or test frameworks adopted by other programs.
  • Subsystem depth in HBM, SerDes/high-speed I/O, power/thermal, or advanced packaging and associated failure modes and instrumentation.
  • Experience partnering with engineering teams in India or other global hubs and running shared on-call or metrics across geographies.

Education Requirements

BTech/BE or MTech/ME in Electronics, Electrical, or Computer Engineering (or equivalent practical experience) as stated in the posting.

Applications for this job will be accepted at least until September 14, 2026.


About the Company

Company: NVIDIA

Headquarters: Santa Clara, California, USA

NVIDIA is a global leader in accelerated computing, renowned for its innovative solutions in AI and digital twins that transform diverse industries. The company specializes in networking technologies, providing end-to-end InfiniBand and Ethernet solutions for servers and storage that optimize performance and scalability. NVIDIA serves sectors such as high-performance computing, enterprise data centers, and cloud computing, constantly reinventing its products and services to stay ahead in the market.

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Date Posted: 2026-09-11