Senior Standard Cell and IP Application Engineer

Job Title

Senior Standard Cell and IP Application Engineer

Role Summary

Member of the Intel Foundry / DTP Customer Engineering team responsible for end-to-end delivery and customer support of foundational IP (standard cell libraries, GPIOs, PLLs, and other analog/mixed-signal IP). The role owns release packaging, QA monitoring, integration support, and customer-facing collateral for assigned IP families.

Works cross-functionally with FIP development teams, Foundry Services, ecosystem partners, and program managers to meet release schedules and quality targets. Eligible for hybrid work model based at the Bangalore site.

Experience Level

Senior. Posting specifies experience guidance: typically 4+ years with a Bachelor's degree or 3+ years with a Master's degree in a relevant field.

Responsibilities

Primary responsibilities include technical ownership of IP releases, customer support, and continuous improvement of release workflows.

• Package, validate, and release foundational IP collateral (standard cell libraries, PDK content, GPIOs, PLLs) into IP delivery portals and PLM systems.
• Drive end-to-end release execution, QA monitoring, and compliance with SDLC/SDL and Intel IP governance.
• Serve as primary technical contact for internal and external customers: debug, integration, and escalation management.
• Coordinate release communications, documentation, and customer-facing release notes with TPMs and customer engineering leads.
• Review IP performance and QA results; contribute to verification methodology and release automation.
• Improve packaging throughput, tooling, and support workflows (intake/triage systems such as Jira/JSM).
• Create application notes, integration guides, and other customer collateral to reduce support load.
• Mentor junior engineers and promote team best practices for IP release and customer support.

Requirements

Focus on hands-on IP, QA, tooling, and customer-support experience. Degree requirements are summarized separately under Education Requirements.

Must-have:

• Experience with IP quality assessment, IP release processes, and technical customer support for foundational IP.
• Hands-on experience with standard cell libraries and analog/mixed-signal IPs (PLLs, GPIOs), including library characterization and QA flows.
• Working knowledge of Synopsys and Cadence design and characterization tools used in standard cell and analog IP flows.
• Experience with PDK release flows and IP lifecycle management tools and portals (packaging and PLM workflows).
• Proven ability to debug integration issues and coordinate cross-team resolution.
• Experience producing customer-facing documentation and managing release communications.
• Familiarity with issue-tracking and intake/triage tooling (e.g., Jira, JSM).
• Strong communication skills and ability to drive initiatives across multiple stakeholders.

Nice-to-have:

• Experience supporting external foundry customers in an ecosystem/IFS model.
• Familiarity with specific PLM systems mentioned in the source (Teamcenter, Carbon) and IP delivery portals.
• Experience automating release packaging and QA processes.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (required with ~4+ years' relevant experience), or a Master's degree in those fields (required with ~3+ years' relevant experience). The posting allows equivalent industry experience in lieu of a listed degree.

About the Company

Company: Intel Corporation

Headquarters: Santa Clara, California, USA

Intel Corporation is a leading multinational technology company known for its innovative semiconductor solutions, including microprocessors, artificial intelligence accelerators, and memory products. Headquartered in the United States, Intel focuses on cutting-edge technology and a collaborative working environment, driving advancements in semiconductor manufacturing to meet global demands. The company emphasizes professional development and aims to shape the future of technology through groundbreaking designs.