Senior Staff Verification Engineer, DDR/LPDDR
SynopsysJob Title
Senior Staff Verification Engineer, DDR/LPDDR
Role Summary
Design and execute verification strategies for DDR PHY and memory-subsystem IP. Build UVM/SystemVerilog testbenches, write assertions and coverage, debug RTL and gate-level failures, and mentor verification engineers to ensure silicon quality before tape-out.
Experience Level
Senior — requires 8+ years of hands-on ASIC verification experience.
Responsibilities
Primary responsibilities include verification planning, testbench development, coverage closure, and cross-team debugging.
- Define and track verification test plans for DDR PHY and memory-subsystem IP, translating architecture specs into executable strategies.
- Design and implement constrained-random SystemVerilog testbenches using UVM and build reusable verification components.
- Write SystemVerilog assertions and functional coverage models to close gaps and catch protocol violations.
- Debug RTL and gate-level simulation failures and work with design engineers to root-cause complex memory-interface issues.
- Perform code and functional coverage analysis and drive coverage closure for corner cases that matter.
- Mentor and review work from junior verification engineers to raise team effectiveness.
- Integrate AI-assisted verification tools and workflows into team methodology.
Requirements
Must-have technical skills and experience; concise list of desired qualifications.
- Deep proficiency in UVM methodology and SystemVerilog; proven track record of building testbenches that found bugs.
- Strong understanding of DDR memory architecture and DDR PHY design, including timing, training, and calibration flows.
- Working knowledge of DFI protocol, memory controllers, or memory-subsystem integration.
- Solid scripting ability in Perl or Python for automation, parsing results, and flow development.
- Proven debugging skills across RTL and gate-level simulations.
- Experience mentoring engineers and participating as a senior technical voice in reviews and tape-out readiness.
- Nice-to-have: experience with AI-assisted verification tools and workflows.
Education Requirements
Bachelor's degree in Electrical Engineering or Computer Engineering and 8+ years of hands-on ASIC verification experience. The posting does not specify an explicit equivalent-experience alternative.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
