Senior Staff Verification Engineer

Job Title

Senior Staff Verification Engineer

Role Summary

Senior verification engineer responsible for planning and executing verification of digital/mixed-signal IP blocks, subsystems and full ASICs. Works with design, analog, firmware and system teams to define verification scope, build verification environments, run regressions and close coverage.

Role includes technical leadership, mentoring junior engineers, and improving verification infrastructure and automation to increase reuse and scalability across projects.

Experience Level

Senior-level. Requires significant industry experience; minimum is 8+ years in integrated circuit design verification.

Responsibilities

Primary responsibilities include defining verification strategy, implementing environments, and delivering verified RTL/AMS designs.

• Define and maintain verification plans, coverage models and test strategies for IP blocks, subsystems and full chips.
• Design and implement complex testbenches using SystemVerilog and UVM; develop directed and constrained-random tests, scoreboards, monitors and checkers.
• Perform RTL, gate-level and analog/mixed-signal verification; debug simulation failures and identify root causes.
• Improve verification scalability and portability through environment enhancements and automation; maintain CI and regression flows.
• Collaborate with design, system, firmware, analog and cross-functional teams; provide technical support to silicon lab, test and application engineers.
• Mentor junior verification engineers and report to remote verification and design teams.
• Drive adoption of advanced verification methodologies, best practices and tool evaluations.

Requirements

Must-have technical skills, tools and behaviors required for the role.

• 8+ years industry experience in integrated circuit design verification (DV).
• In-depth experience in digital IC verification for mixed-signal designs with MCU-based hardware systems and peripherals.
• Proficiency with SystemVerilog and UVM; experience with Verilog or VHDL.
• Experience with scripting for automation and debug (Python, Perl, or similar).
• Familiarity with industry EDA verification tools (Synopsys, Cadence, Siemens or equivalents).
• Experience debugging complex simulation issues and performing root-cause analysis across RTL, verification environments and tool flows.
• Working knowledge of standard hardware protocols such as I2C, I3C, SPI, MIPI.
• Demonstrated technical leadership, strong analytical and problem-solving skills, and effective written and verbal communication.
• Independent, self-motivated, rigorous, and able to collaborate in a team setting.

Nice-to-have:

• Experience in system-level signal processing, embedded firmware integration and mixed-signal modeling.
• Analog behavioral modeling experience (SV RNM/Verilog/VHDL) and consumer/ITA market product experience.

Education Requirements

B.S. or M.S. in Electrical Engineering or Computer Engineering (or equivalent technical degree).

About the Company

Company: Semtech

Headquarters: Camarillo, California, USA

Semtech Corporation is a high-performance semiconductor company providing IoT systems and Cloud connectivity solutions. The company focuses on delivering innovative technology solutions that support a smarter, more connected, and sustainable planet, with a dedication to quality across infrastructure, industrial, and consumer markets.