Job Title
Senior Staff Verification Engineer
Role Summary
Lead verification activities for digital and mixed-signal IP, subsystems, and full integrated circuits. Develop verification plans, create SystemVerilog/UVM testbenches, and coordinate with design, firmware, analog, and systems teams to ensure functional correctness and coverage closure.
Provide technical leadership, mentor junior engineers, and support silicon evaluation, test, and product teams.
Experience Level
Senior β minimum 8 years of industry experience in integrated circuit design verification.
Responsibilities
The role owns verification strategy, environment development, and delivery of verification closure. Key responsibilities include:
- Define and maintain verification plans, coverage models, and test strategies for IP blocks, subsystems, and full SoCs.
- Design and implement complex SystemVerilog/UVM testbenches and reusable verification components.
- Perform RTL, gate-level, and analog/mixed-signal verification; develop directed and constrained-random tests.
- Debug simulation failures, identify root causes in design or verification environments, and drive fixes.
- Improve verification scalability and portability through environment enhancement and tool automation.
- Implement and manage CI, regression suites, scoreboards, monitors, and checkers; drive functional, code, and assertion coverage closure.
- Mentor junior verification engineers and report to distributed verification and design teams.
- Coordinate with system, digital hardware, embedded firmware, analog, and cross-functional teams; provide technical support to silicon lab and test engineers.
- Drive adoption of advanced verification methodologies, evaluate tools, and promote best practices.
Requirements
Must-have technical skills and experience:
- 8+ years of industry experience in integrated circuit design verification.
- Deep experience in digital IC verification for mixed-signal systems with MCU-based hardware (ARM, RISC-V, PIC, STM32), memories, custom micro-architecture, peripherals, and embedded signal processing.
- Proficiency in SystemVerilog (verification), UVM, Verilog/VHDL, and scripting languages such as Python or Perl.
- Experience with commercial EDA verification tools (Synopsys, Cadence, Siemens).
- Familiarity with standard hardware protocols: I2C, I3C, SPI, MIPI.
- Strong analytical, synthesis, debugging, and problem-solving skills; demonstrated technical leadership.
- Excellent verbal and written communication; independent and collaborative work style.
Nice-to-have:
- Knowledge of system-level signal processing, mixed-signal design, embedded firmware, analog modeling, and test/application considerations.
- Experience with analog block behavioral modeling (SV RNM/Verilog/VHDL).
- Experience in consumer or ITA market circuit development.
Education Requirements
B.S. or M.S. in Electrical Engineering or Computer Engineering.
About the Company
Company: Semtech
Headquarters: Camarillo, California, USA
Semtech Corporation is a high-performance semiconductor company providing IoT systems and Cloud connectivity solutions. The company focuses on delivering innovative technology solutions that support a smarter, more connected, and sustainable planet, with a dedication to quality across infrastructure, industrial, and consumer markets.

Date Posted: 2026-05-14