Senior Staff QA/Test Engineer

Job Title

Senior Staff QA/Test Engineer

Role Summary

Work on backend FPGA tool validation, test automation, and regression for Radiant/Diamond or similar FPGA tool flows. The role sits on an engineering team focused on ensuring backend tool quality across synthesis, place-and-route and bitstream generation for a variety of designs.

This position is based in Pune and requires the right to work in India and successful background/reference checks.

Experience Level

Senior — requires 12+ years of experience in EDA, RTL development, or verification.

Responsibilities

Primary responsibilities include validating FPGA backend tools and maintaining automated regression test frameworks.

• Design, create and maintain test suites targeting backend tools (synthesis, map, place-and-route, bitgen) and run them in regression frameworks.
• Develop and execute test plans for new features and tool changes.
• Monitor regressions, analyze failures, report issues and drive timely closure with stakeholders.
• Debug issues in simulation and on hardware to isolate tool or design problems.
• Automate testing activities and improve automation using modern AI-assisted tools where appropriate.
• Collaborate and communicate effectively with geographically distributed teams.

Requirements

Must-have technical skills and experience.

• 12+ years of experience in EDA, RTL development, or verification.
• Very strong understanding of FPGA architectures and backend tool flows.
• Hands-on experience with Lattice Diamond / Radiant, Vivado or similar FPGA tool chains.
• Experience writing Verilog RTL test designs that exercise complex, customer-like scenarios for backend testing.
• Strong debugging skills across simulation and hardware platforms.
• Experience building and maintaining regression frameworks and analyzing results.
• Strong verbal and written communication skills; experience coordinating across multiple teams and locations.
• Preferred: experience with scripting (Python, Perl, Tcl) and with high-speed I/O protocols (PCIe, DDR).

Education Requirements

BS or MS in Electrical Engineering, Electronics, Computer Science, Computer Engineering, or a closely related technical field (as stated in the posting).

About the Company

Company: Lattice Semiconductor

Headquarters: Portland, Oregon, USA

Lattice Semiconductor specializes in low power, small-form-factor programmable logic devices and solutions. The company is known for its innovative technology that enables a wide range of applications, including communication, consumer, and industrial markets.