Senior Staff Product Engineer, Simulation and Mixed-Signal Verification
SynopsysJob Title
Senior Staff Product Engineer, Simulation and Mixed-Signal Verification
Role Summary
Customer-facing engineering role supporting deployment, debug, and performance optimization of simulation and verification solutions for complex SoCs. You will work with semiconductor customers and internal R&D to resolve verification bottlenecks and influence product direction.
Experience Level
Senior-level. The posting requests 5+ years in Product Engineering, Applications Engineering, Functional Verification, ASIC/SoC Verification, or Simulation Technologies.
Responsibilities
Primary responsibilities focus on customer engagements, debugging, performance, and knowledge transfer.
- Lead technical engagements with strategic customers as the primary technical interface for methodology, performance, debug, and signoff.
- Investigate and resolve RTL and gate-level simulation issues, assertion failures, coverage gaps, X-propagation, timing annotation, and nondeterminism.
- Analyze and optimize simulation compilation, elaboration, testbench architecture, and regression throughput across block to full-chip environments.
- Support digital-analog co-simulation and mixed-signal verification when required.
- Collaborate with Product Management and R&D to prioritize enhancements and shape the product roadmap based on customer deployments.
- Author application notes, reference flows, deployment guides, and debug playbooks; deliver technical presentations and training to customers and internal teams.
Requirements
Must-have technical skills and experience; listed succinctly. Education requirements are detailed separately below.
- 5+ years of relevant experience in product or applications engineering, functional verification, or simulation technologies.
- Deep expertise in RTL and gate-level simulation, SystemVerilog, UVM, SVA assertions, and coverage-driven verification.
- Experience with simulation compilation and elaboration, debug workflows, regression automation, and testbench architecture.
- Strong understanding of event-driven simulation semantics, X-propagation, timing simulation and SDF annotation, race conditions, and nondeterminism.
- Proven ability to debug complex SoC verification environments and identify root causes across RTL, testbench, assertions, models, tool configuration, and infrastructure.
- Strong customer engagement skills: presenting technical content, leading escalations, and converting customer issues into actionable product feedback.
- Nice-to-have: experience with analog mixed-signal verification, Verilog-AMS, behavioral modeling, and AMS testbench integration.
Education Requirements
BS or MS in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.
About the Company
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
