Senior Staff Physical Verification CAD Engineer

Job Title

Senior Staff Physical Verification CAD Engineer

Role Summary

Lead development and support of Marvell's physical verification (PV) automation and CAD infrastructure within Central Engineering. The role focuses on PV flow development, tool integration, and ensuring robust signoff flows for advanced process technologies.

Work includes building and deploying PV flows, integrating with the overall CAD platform, interfacing with EDA vendors, and mentoring engineers.

Experience Level

Senior-level. Typically requires several years of relevant PV/CAD engineering experience and demonstrated project leadership and mentoring ability.

Responsibilities

Primary responsibilities include:

• Develop and maintain physical verification (PV) flows for multiple business units.
• Deploy, support, and scale PV automation across projects and technologies.
• Integrate PV flows into the broader CAD platform and workflows.
• Implement and optimize signoff flows (ICV and Calibre) to improve turnaround and quality.
• Onboard and support third-party IP and ensure collaboration with external suppliers.
• Interface with EDA vendors to maximize tool effectiveness and keep up with tool/process evolution.
• Provide technical leadership, mentor junior engineers, and lead cross-team initiatives.

Requirements

Key qualifications and skills. Degree details are listed separately under Education Requirements.

Must-have:

• Proven experience developing and supporting PV flows and production signoff flows.
• Proficiency with Synopsys ICV (required) and practical experience with EDA tool suites (Cadence, Synopsys, Mentor Graphics).
• Scripting skills (Tcl, Perl, Python) for automation and flow development.
• Strong understanding of the complete IC design flow, including place-and-route, timing analysis, and physical verification.
• Demonstrated ability to lead projects, provide technical guidance, and mentor junior engineers.
• Ability to work with international IP suppliers and support signoff across multiple technologies.
• May require eligibility to access export-controlled technology per applicable laws.

Nice-to-have:

• Experience with Mentor Calibre svrf/tvf.
• Familiarity with advanced process nodes (N5/N5A, 3nm, 2nm), 3DIC, or PMIC design considerations.
• Experience implementing dual Calibre and ICV signoff flows and optimizing turnaround time.

Education Requirements

BS in Computer Science or Electrical Engineering (typical) with ~5–10 years of relevant experience, or MS/PhD with ~3–5 years of relevant experience. Fields explicitly cited: Computer Science, Electrical Engineering. No certifications were specified.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.