Senior Staff Layout Engineer
The Senior Staff Layout Engineer will lead the development of next-generation DDR and HBM PHY IP layouts, harnessing expertise in advanced process nodes (7nm and below). The role involves overseeing the complete layout design process, mentoring junior engineers, and collaborating across cross-functional teams to ensure project success.
Senior level with 8+ years of hands-on experience required.
The responsibilities include:
Applicants should meet the following requirements:
Bachelor’s or Master’s degree in Electrical Engineering or related field.
Company: Synopsys
Headquarters: Mountain View, California, USA
Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.
