Senior Staff Engineer, Totem (R&D Engineering)

Job Title

Senior Staff Engineer, Totem (R&D Engineering)

Role Summary

Develop and optimize high-performance EDA algorithms and C++ implementations for the Totem product line, focusing on power noise integrity, electromigration, thermal analysis, and related reliability analyses for advanced semiconductor nodes.

Work on a global R&D team to deliver signoff-quality power and reliability analysis that scales to billion-transistor designs.

Experience Level

Senior-level. The posting expects ~5+ years of relevant industry experience and at least 3+ years writing production C or C++ code.

Responsibilities

Key responsibilities include:

• Design, implement, and optimize core algorithms for power noise integrity, electromigration, thermal analysis, and ESD modeling for advanced nodes (3DIC, FinFET, GAA).
• Develop and maintain high-performance C++ code for parasitic extraction, transistor-level simulation, and gate-level power analysis across distributed environments.
• Profile and optimize runtime and memory to handle designs with billions of transistors; apply parallel processing and algorithmic improvements.
• Diagnose and fix complex defects in large commercial codebases; ensure correctness, scalability, and maintainability under tight schedules.
• Create unit, regression, and system tests to validate features and prevent regressions.
• Collaborate with product management, technical leads, and field engineers to translate customer design challenges into software solutions.
• Explore and integrate machine learning / AI techniques to improve accuracy, performance, and predictive capabilities in EDA workflows.

Requirements

Must-have technical skills and experience; differentiators noted.

• At least 3+ years professional experience writing production C or C++ with strong understanding of memory management and performance optimization.
• Practical Linux development experience including debugging and deployment.
• Strong foundation in data structures, algorithms, and parallel processing for large-scale computation.
• Solid understanding of gate-level or transistor-level electronic design: circuit behavior, timing, and power concepts.
• Experience profiling, parallelizing, and scaling tools to handle very large designs; emphasis on runtime and memory optimization.
• Ability to create and maintain automated test frameworks (unit, regression, system tests).
• Good communication and code-review skills; ability to work on large codebases and collaborate with cross-functional teams.
• Nice-to-have: Python scripting for automation, background in parasitic extraction / transistor-level simulation / gate-level power analysis, and experience applying ML in EDA.

Education Requirements

Bachelor's degree in Electrical Engineering, Computer Science, or a related field with 5+ years of experience, or a Master's degree in these fields. (Degree requirement as stated in the source.)

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.