Senior Staff Engineer - Subsystem CoE Emulation

Job Title

Senior Staff Engineer - Subsystem CoE Emulation

Role Summary

Lead development and execution of scalable emulation environments for complex SoC subsystems to enable pre-silicon validation, firmware bring-up, and system-level verification.

Collaborate with RTL design, verification, firmware, and software teams and with EDA vendors to develop accurate emulation models, integrate subsystems, and resolve cross-domain issues.

Experience Level

Senior-level. Experience guidance: 8+ years preferred; see Education Requirements for degree guidance.

Responsibilities

Primary responsibilities include building and maintaining emulation infrastructure, driving bring-up and validation activities, and supporting software/firmware readiness.

• Develop complex SoC emulation models and integration across platforms (e.g., Veloce, ZeBu, Palladium).
• Drive emulation bring-up: clock/reset sequencing, firmware boot, and system validation using pre-silicon models.
• Create and execute emulation test plans for verification, performance analysis, and software development.
• Collaborate with RTL, verification, and firmware teams to define requirements and ensure accurate hardware model integration.
• Debug complex SoC and subsystem issues across RTL, firmware, emulation platforms, and toolchains.
• Optimize emulation performance: model partitioning, timing, and runtime efficiency.
• Automate flows and improve productivity through scripting and tooling enhancements.
• Engage with EDA vendors to evaluate tools, resolve technical issues, and drive improvements.
• Define and execute emulation strategy for subsystems (Boot, Security, PCIe, CXL, DDR, HBM, USB, Ethernet, peripherals).
• Enable firmware and software teams by providing stable, scalable emulation environments.

Requirements

Must-have technical skills and capabilities to perform the role.

• Proven experience in SoC emulation, validation, and debug (hands-on with emulation platforms such as Palladium, ZeBu, Veloce).
• Domain expertise in one or more areas: boot flow, security validation, high-speed protocols (PCIe, CXL, Ethernet), memory interfaces (DDR, HBM), peripheral interfaces (SPI, I2C, UART, USB 3.0).
• Deep understanding of SoC architecture, interconnects, and system-level integration.
• Strong debugging skills across the hardware/software boundary and complex toolchains.
• Proficiency in scripting languages for automation and tooling (Python, Perl, Tcl, Shell).
• Proven ability to lead cross-functional efforts and drive execution to delivery.

Education Requirements

Bachelor's degree with 8+ years of relevant experience, or Master’s/PhD with 6+ years, in Electrical Engineering, Computer Science, or a related technical field; or equivalent practical experience.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.