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Senior/Staff Engineer — Post-Silicon Bring-Up

Cerebras
August 27, 2026
Full-time
On-site
Bengaluru, Karnataka, India
$175,000 - $275,000 USD yearly
Test Engineering Jobs, Level - Senior

Job Title

Senior/Staff Engineer — Post-Silicon Bring-Up

Role Summary

Responsible for post-silicon bring-up and performance optimizations of Cerebras's Wafer Scale Engine (WSE). The role works across chip design, system performance, software, and product teams to deliver deployable silicon test and validation infrastructure and drive performance improvements.

Work will involve developing instrumentation, automation, and test flows to validate WSE under real workloads and production processes.

Experience Level

Senior-level. Typical guidance: 7–10+ years of industry experience with several years in pre- and post-silicon ASIC hardware and system bring-up.

Responsibilities

Primary responsibilities include bring-up, test infrastructure, and cross-functional performance work:

  • Develop and debug production-ready bring-up flows for Wafer Scale Engines to reduce time and cost.
  • Refine AI systems across hardware/software design constraints (di/dt, V-F characterization, current and temperature limits) to optimize performance.
  • Build and enhance infrastructure for real-world workload testing of silicon.
  • Create self-checking metrics, instrumentation for debug, and coverage tools.
  • Collaborate with silicon architects, performance engineers, and software engineers to improve WSE performance.
  • Work across Software, Design, Verification, Emulation, and Validation domains to refine processes and performance.
  • Integrate with CI/CD, git repositories, and automated release flows (GitHub actions, Jenkins) to streamline test and release.

Requirements

Must-have skills and experience; preferred items listed separately below.

  • 7–10+ years of industry experience in relevant roles.
  • 3–5 years experience with pre-silicon and post-silicon ASIC hardware and bring-up.
  • Strong understanding of computer architecture and networking.
  • Proficient coding skills in Python and C; experience with Verilog/SystemVerilog.
  • Experience with hardware/software codesign and layered system architectures.
  • Strong debugging, analytical, and problem-solving skills.
  • Experience with large-scale testing and automation frameworks (pytest, Python automation).
  • Good presentation and interpersonal skills; experience driving cross-functional issues to closure.

Education Requirements

BS/BE/B.Tech or MS/M.Tech in Electrical Engineering, Electronics & Communication, Computer Science, or a related technical field — or equivalent practical experience.

Preferred

  • Experience with AI/ML systems using designs with 100+ CPU cores and communication fabric-based architectures.
  • Familiarity with in-line testing, diagnostics using CPU memory/execution and self-checking techniques.
  • Knowledge of chip defect profiles and cross-stack mitigation strategies.
  • Experience building large-scale test and software infrastructure for silicon validation.
  • Experience coordinating work across global time zones.

Location

Primary locations listed by the employer include Sunnyvale, CA (United States); Bangalore / Bengaluru, India; and Toronto, Canada. Role is onsite at listed locations.

Compensation

Base salary range: $175,000 to $275,000 annually. Actual compensation may include bonus and equity and will be determined based on experience and qualifications.

Equal Opportunity

Cerebras is an equal opportunity employer and values diversity. The company supports inclusive teams and continuous learning.


About the Company

Company: Cerebras

Headquarters: Sunnyvale, CA, USA

Developer of wafer-scale AI accelerators, Cerebras designs the Wafer Scale Engine (WSE)—one of the world’s largest AI chips—to deliver high-speed training and inference solutions for model labs, enterprises, and AI-native startups.

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Date Posted: 2026-08-27