Job Title
Senior Staff Engineer, Hardware & Silicon Validation
Role Summary
Owner for post-silicon validation of Marvell Connectivity products, responsible for bringing silicon from initial bring-up to mass-production readiness. Works in the Hardware Design & Silicon Validation team operating a validation lab and advanced instrumentation.
Collaborates with digital, analog, DSP, firmware, AE, and qualification teams to validate high-speed SerDes/DSP-based transceivers and interconnect products across functionality, performance, compliance, and reliability dimensions.
Experience Level
Senior. Typical expectation: Senior Staff level requires 8+ years of relevant experience (Staff level typically ~5+ years).
Responsibilities
Primary responsibilities include:
- Plan, set up, and execute post-silicon validation across functionality, performance, compliance, robustness, interoperability, power, and PVT corners.
- Characterize high-speed SerDes and DSP-based connectivity products; verify FLL/PLL, TX/RX signal quality, AVS, FEC, BER margin, and link behavior across PVT.
- Perform interoperability and compliance validation for PAM4 optical, AEC copper, PCIe/CXL and other high-speed interfaces per relevant standards.
- Drive silicon bring-up, chip screening, and engineering-sample validation on EVB platforms; debug hardware and firmware interactions during early bring-up.
- Develop and maintain automated test scripts, validation frameworks, and regression flows (e.g., Python, Jenkins) to increase coverage and reduce cycle time.
- Collaborate cross-functionally to investigate and resolve silicon issues and meet program milestones.
- Author validation plans, test reports, and maintain issue trackers and engineering archives.
- At senior level: lead a validation domain or program, mentor junior engineers, define methodology and drive cross-site alignment.
Requirements
Must-have technical skills and experience:
- Hands-on post-silicon validation, silicon characterization, or high-speed system-level testing experience.
- Solid understanding of high-speed SerDes interfaces (PAM4/NRZ) and metrics: BER, eye margin, jitter, TX/RX compliance, equalization, and signal integrity fundamentals.
- Experience with one or more standards/protocols: PAM4 optical (IEEE 802.3), OIF CEI/AEC, PCIe Gen5/Gen6/Gen7, CXL, or equivalent high-speed interconnects.
- Proficiency in test automation using Python and/or Bash; experience with automated lab equipment control.
- Working knowledge of lab instruments: oscilloscopes, BERTs, DCA sampling scopes, signal/spectrum analyzers, thermal controllers, and related equipment.
- Practical experience with EVB bring-up and high-speed PCB signal-integrity debug.
- Effective verbal and written communication for cross-time-zone collaboration and reporting.
Nice-to-have:
- Experience with MATLAB, ADS, or similar simulation/analysis tools.
- Experience in electro-optical systems, analog circuit characterization, or DSP-based transceiver products.
Education Requirements
BSEE or MSEE (Electrical Engineering, Electronics & Telecommunications, Computer Engineering, Computer Science or related technical field) or equivalent practical experience. The posting specifies equivalent degree or experience language and differentiates experience expectations: ~5+ years for Staff and ~8+ years for Senior Staff.
About the Company
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.

Date Posted: 2026-06-26