Senior/Staff Engineer, DFT Engineering

Job Title

Senior/Staff Engineer, DFT Engineering

Role Summary

The Senior/Staff Engineer in DFT Engineering will join the DCE CCS Hardware Group to drive Design for Test (DFT) innovation for next-generation silicon. The role focuses on defining DFT flows, enabling automation, and supporting engineering teams across projects.

Experience Level

Mid-level; 3+ years of experience required in Design for Test (DFT).

Responsibilities

The key responsibilities of this position include:

• Controlling and updating DFT design flow for project teams.
• Maintaining DFT flows with the latest EDA tools (Siemens Tessent).
• Collaborating with teams to implement DFT features and facilitate adoption.
• Driving automation and continuous improvement in the design process.

Requirements

The applicant must meet the following requirements:

• Bachelor’s or Master’s degree in Electrical/Computer Engineering, Computer Science, or a related field.
• 3+ years of experience in Design for Test (DFT) with a solid understanding of ASIC design flows.
• Expertise in Scan/Compression, MBIST, BSCAN, ATPG, and DFT design automation.
• Proficient with tools like Siemens Tessent, VCS, ModelSim, or Xcelium.
• Proactive attitude with good English communication skills.

Education Requirements

Bachelor’s or Master’s degree in Electrical/Computer Engineering, Computer Science, or a related technical field is preferred.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.