Senior Staff Engineer - Design Verification

Job Title

Senior Staff Engineer - Design Verification

Role Summary

Lead design verification for SOC and subsystem-level ASIC projects within Marvell's Custom Compute & Storage business unit. The role covers verification architecture, planning, UVM-based testbench development, integration of VIPs and in-house components, RTL and gate-level verification, and coverage analysis.

Expect to mentor junior engineers, drive verification process improvements, and coordinate with global cross-functional teams to ensure timely, high-quality silicon deliveries.

Experience Level

Senior — Senior Staff engineering level. Specific years of experience not specified, but role requires extensive SOC/subsystem verification background and demonstrated technical leadership.

Responsibilities

Primary responsibilities include:

• Lead SOC and subsystem verification efforts from specification through silicon delivery.
• Define verification architecture and develop verification plans.
• Develop and maintain UVM-based testbenches; integrate complex VIPs (ARM, Cadence, Synopsys, etc.) and in-house verification components.
• Write and debug tests in UVM and C; create BFMs, scoreboards, monitors, and assembly tests as required.
• Perform RTL and gate-level verification and coverage analysis; use assertion-based verification where applicable.
• Conduct design and verification reviews; drive process and quality improvements.
• Mentor and provide technical guidance to junior engineers; manage deliverables within a global team.
• Communicate technical status and issues clearly in writing and verbally.

Requirements

Key qualifications and skills for the role.

• Must-have: SOC/subsystem-level verification experience on ARM-based SOCs; strong proficiency in UVM testbench development and verification methodologies.
• Must-have: Practical experience with industry interfaces such as DDR, eMMC, PCIe, Ethernet, and USB, and familiarity with AMBA protocols (AXI-4, CHI, ACE).
• Must-have: Proficiency writing and debugging tests in UVM and C; experience with verification tools from Cadence, Synopsys, Mentor, and ARM.
• Must-have: Experience with assertion-based formal verification and hardware emulation support.
• Must-have: Scripting skills (Tcl, Perl) and use of version control tools (CVS, SVN, Git).
• Nice-to-have: Experience with ARM boot environments and familiarity with TLM/SystemC.

Education Requirements

Not specified.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.