Senior Staff Engineer - CAD/EDA Tools & Design Automation Engineer

Job Title

Senior Staff Engineer - CAD/EDA Tools & Design Automation Engineer

Role Summary

Develop and maintain design automation flows, tooling, and infrastructure to support RTL-to-GDSII physical design, verification, and tape-out for advanced process nodes. The role spans design automation, EDA tool integration, DevOps for CI/CD and repositories, and technical leadership to improve design efficiency and reduce manual effort.

Experience Level

Senior-level. The posting specifies 8–12 years of hands-on experience in semiconductor CAD/EDA tool development, deployment, and support.

Responsibilities

Deliver automation tooling, infrastructure, and integrations to streamline design and verification flows and support tape-out activities.

• Design and maintain automation flows for synthesis, place-and-route, static timing analysis, physical verification, and power integrity.
• Create robust automation scripts and regression frameworks for workflow orchestration and event-based job invocation.
• Port legacy tools to modern Python-based frameworks and optimize tool performance.
• Integrate AI/ML capabilities to enhance tool productivity and adoption.
• Design and implement CI/CD pipelines using Jenkins and GitHub Actions; manage large-scale Git workflows and repository organization.
• Implement access control, LDAP/ACLs, authorization frameworks, monitoring, and logging (Grafana).
• Manage job scheduling in Linux environments (Sungrid/UGE/LSF) and address storage/compute/network infrastructure needs.
• Deploy, integrate, and support industry-standard EDA tools and coordinate with vendors on licensing and performance.
• Provide technical guidance, mentorship, and documentation for CAD flows, regression workflows, and SOC integration.

Requirements

Key technical and professional requirements. Education requirements are listed separately below.

Must-have:

• 8–12 years of semiconductor CAD/EDA tool development, deployment, and support experience.
• Experience with advanced process nodes (16nm or below; preferably 7nm/5nm).
• Strong Linux development experience and deep expertise in Git, including large-scale repository management and migration strategies.
• Proven experience with CI/CD (Jenkins) and workflow automation (GitHub Actions).
• Hands-on knowledge of job schedulers (Sungrid/UGE/LSF), LDAP groups/ACLs, and access-control mechanisms.
• Primary scripting in Python; additional experience with Perl, Shell, Tcl, GNU Make; C/C++ for performance-critical tools; SQL for databases.
• Experience with monitoring/logging solutions (Grafana) and implementing logging/monitoring frameworks.
• Practical experience with industry EDA tools such as Synopsys (VCS, Design Compiler, ICC2, PrimeTime), Cadence (Virtuoso, Innovus, Genus), and Mentor/Siemens (Calibre).
• Solid understanding of semiconductor design flows (RTL-to-GDSII), physical verification (DRC/LVS/ERC), STA, synthesis, place-and-route, and power analysis.
• Experience in regression automation, profiling/coverage analysis, and multi-process/multi-threaded execution flows.

Nice-to-have:

• Familiarity with Verilog/VHDL and RTL design concepts.
• Containerization and orchestration experience (Docker, Kubernetes) and familiarity with cloud compute (AWS, Azure, GCP).
• Front-end/UI development experience for tool interfaces.
• Advanced Git features (worktrees, submodules, sparse checkouts) and experience with large mono-/multi-repo workspace models.
• Knowledge of DFT, timing-closure methodologies, power/signal integrity, EM/IR analysis, and multiple power-domain implementations.

Education Requirements

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field (as specified in the posting).

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.