Senior Staff Design Verification Engineer

Job Title

Senior Staff Design Verification Engineer

Role Summary

Lead design verification for Cerebras' hardware products, focusing on ensuring first‑silicon quality for large AI accelerator designs. Work closely with architecture, RTL, physical design, firmware, post‑silicon and software teams to define and execute verification strategy and infrastructure.

Experience Level

Senior-level — requires 14+ years of hands-on design verification experience.

Responsibilities

Primary responsibilities include:

• Define and implement verification strategies, detailed tests, and coverage plans based on microarchitecture.
• Create reusable verification environments and methodologies (stimulus, checkers, assertions, coverage).
• Implement tests, run and manage regressions, gather coverage, and debug failures across simulation and emulation.
• Analyze and debug complex issues during simulation, emulation, and silicon bring‑up.
• Collaborate with cross‑functional teams (architecture, RTL, physical design, firmware, validation) to drive verification closure.
• Continuously improve verification infrastructure, flows, and best practices across the organization.

Requirements

Must-have technical skills and experience:

• Deep knowledge of SystemVerilog testbenches, DPI and UVM.
• Strong debugging and problem-solving skills across RTL, simulation, emulation, and silicon bring‑up.
• Excellent programming skills and software engineering practices, including object‑oriented design.
• Experience building scalable, portable testbenches and verification components.
• Familiarity with verification tools and methodologies: simulators, waveform viewers, build/run automation, coverage collection, and gate‑level simulation.
• Proficient in scripting languages such as Python or Perl to automate flows and analysis.
• Good interpersonal and communication skills; able to work effectively in cross‑disciplinary teams.
• Self-motivated with a strong drive to solve hard problems and deliver production-quality results.
• Nice-to-have: knowledge of pipelined processor architecture.

Education Requirements

Bachelor's or Master's degree in Computer Science or Electrical Engineering (BS or MS) as stated in the posting.

About the Company

Company: Cerebras

Headquarters: Sunnyvale, CA, USA

Developer of wafer-scale AI accelerators, Cerebras designs the Wafer Scale Engine (WSE)—one of the world’s largest AI chips—to deliver high-speed training and inference solutions for model labs, enterprises, and AI-native startups.