Senior Staff CAD Engineer

Job Title

Senior Staff CAD Engineer

Role Summary

Senior CAD engineer on Central Engineering responsible for developing and maintaining automated place-and-route (P&R) flows and related add-on tools. Define and drive design methodology and workflows across business units and ensure smooth integration into the overall CAD platform.

Collaborate with design teams and EDA vendors to deploy, support, and evolve flows for advanced-node SoC designs.

Experience Level

Senior — typically requires a Bachelor's plus 5–10 years, or a Master's/PhD plus 3–5 years, or equivalent professional experience.

Responsibilities

You will develop, deploy, and support P&R flows and related automation while collaborating across teams and vendors.

• Develop and maintain leading-edge P&R flows to meet the needs of multiple business units.
• Deploy, support, and integrate flows into the central CAD platform.
• Define organization-wide design methodology and automated tool chains.
• Write and maintain flow automation (Tcl scripting) and add-on tools.
• Interface with EDA vendors to optimize tool usage and address tool/process changes.
• Troubleshoot and resolve design issues including timing closure, floorplanning, routability, power grid, clocking, SI/EM/IR, and DRC-related problems.
• Provide guidance for advanced-node (7nm and below) implementation trade-offs and constraints.

Requirements

Must-have technical skills and experience.

• 2+ years recent experience with Cadence Innovus.
• Proven tapeout experience at advanced nodes (7nm or below); familiarity with FinFET, dual patterning, and ULV challenges.
• Strong understanding of timing closure, floorplanning, routability, power grid design and validation, clock synthesis, SI/EM/IR, and complex DRC rules.
• Experience implementing power intent and multiple power domains; knowledge of high-speed and low-power implementation trade-offs.
• Ability to correlate upstream and downstream flows.
• Proficiency in Tcl scripting within flow development context.
• Strong analytical and problem-solving skills; effective verbal and written communication; team player.
• May require eligibility to access export-controlled technology (export license review for non-U.S. citizens).

Preferred / Nice-to-have:

• Gate-to-gate equivalence checking experience.
• Parasitic extraction and STA experience.
• Physical verification experience (at least DRC) and early rail analysis.
• Experience with implementation exploration methods and EDA tool benchmarking.

Education Requirements

Bachelor's degree in Computer Science, Electrical Engineering, or a related field (typical: Bachelor + 5–10 years) or a Master’s/PhD in those fields (typical: Master’s/PhD + 3–5 years), or equivalent professional experience in lieu of a formal degree.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.