Senior Staff ASIC Product Engineer

Job Title

Senior Staff ASIC Product Engineer

Role Summary

Join a product engineering team responsible for test and qualification of large, complex ASIC products. The role leads debug, characterization, and production test strategy across wafer sort, final test, and system-level test.

This is a hands-on technical position that works closely with ASIC design, DFT/DFM, process, test engineering and quality teams to improve yield, test coverage and production test efficiency.

Experience Level

Senior-level. Typical experience ranges: ~5–10 years for candidates with a Bachelor's, or ~3–5 years with a Master’s/PhD.

Responsibilities

Key responsibilities include leading test development, production test optimization, and cross-team troubleshooting.

• Lead debug and characterization of product tests and on-chip test IP.
• Develop test strategies and detailed test plans for wafer sort, final test and system test.
• Analyze volume test data, identify trends and implement corrective actions to improve yield and DPPM.
• Drive optimization of production test screen specifications and reduce test time.
• Collaborate with design, DFT/DFM, process, applications and test teams to improve test coverage and yield.
• Support RMA investigations, customer escalations, and cross-functional reliability/quality reviews.
• Lead new product and package/fab qualification prior to volume production.

Requirements

Must-have technical skills and attributes; nice-to-have items noted.

• Extensive experience with ATE systems (e.g., Advantest UltraFLEX, Teradyne) and production test environments.
• Experience in test methodology development, DFT/DFM and high-speed digital testing.
• Proven ability to analyze large test datasets and translate findings into actionable test or yield improvements.
• Strong problem-solving skills, clear verbal and written communication, and demonstrated cross-team collaboration.
• Experience defining yield and manufacturing specifications and balancing yield, quality, and test-time requirements.
• Ability to lead test flow optimization and continuous improvement initiatives on the production floor.
• Nice to have: mixed-signal testing experience.

Education Requirements

Requires a Bachelor's degree in Computer Science, Electrical Engineering or related field with ~5–10 years of relevant experience, or a Master’s/PhD in Computer Science, Electrical Engineering or related field with ~3–5 years of relevant experience.

About the Company

Company: Marvell Technology

Headquarters: Santa Clara, California, United States

Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.