Senior Staff ASIC CAD Flow Infrastructure Engineer
Lead development and operation of ASIC CAD flow, automation frameworks, and infrastructure to enable efficient SoC design and tapeout across multiple product generations. Collaborate with Design, Physical Design and IT teams to deliver robust, reusable, and maintainable EDA solutions that improve engineering productivity and design quality.
Senior-level. The role expects significant ASIC CAD/EDA experience; typical guidance is 5+ years in CAD or design-infrastructure engineering, with 8+ years preferred.
Design, build, and support scalable CAD flows, automation, and monitoring to enable ASIC/SoC development.
Must-have technical skills and experience; nice-to-have items listed separately.
Nice-to-have:
Bachelor's degree in Computer Science, Electrical Engineering, or a related field (with 5–10 years relevant experience); or Master's degree or PhD in Computer Science, Electrical Engineering or related field (with 3–5 years relevant experience). The posting also allows equivalent professional experience in lieu of a formal degree.
Company: Marvell Technology
Headquarters: Santa Clara, California, United States
Marvell’s semiconductor solutions serve as essential building blocks of the data infrastructure connecting our world, driving innovation across enterprise, cloud, AI, and carrier architectures. The company focuses on creating transformative technology that shapes the future.
