Senior Staff Applications Engineer, HAV Solutions

Job Title

Senior Staff Applications Engineer, HAV Solutions

Role Summary

Lead technical deployments and customer engagements for Synopsys' Hardware-Assisted Verification (HAV) prototyping platforms, primarily HAPS-200 and ProtoCompiler. Work with strategic semiconductor and systems customers to deliver end-to-end FPGA-based prototyping from partitioning through multi-FPGA bring-up, and collaborate with R&D and Product Management to influence product direction.

Experience Level

Senior - 10+ years of experience in FPGA implementation, ASIC design/verification, hardware-assisted verification, or FPGA prototyping.

Responsibilities

Primary responsibilities include customer-facing technical leadership, executing the full prototyping flow, and mentoring global teams.

• Lead deployments of HAPS-200 and ProtoCompiler for billion-gate SoC prototyping across AI/ML, automotive, hyperscaler, and aerospace customers.
• Drive the full ASIC-to-FPGA flow: partitioning, clock conversion, synthesis, place-and-route, timing closure, bitstream generation, and multi-FPGA hardware bring-up.
• Debug complex interface IP subsystems such as DDR4/DDR5, LPDDR, HBM, PCIe Gen3–6, CXL, UCIe, Ethernet, USB, AXI, and high-speed SerDes.
• Reproduce, analyze, and resolve critical customer escalations involving RTL issues, partitioning failures, timing violations, protocol mismatches, and hardware bring-up failures.
• Collaborate with ProtoCompiler R&D and Product Management to validate features, influence roadmap priorities, and represent customer requirements.
• Develop and document reusable methodologies for partitioning, clock architecture, debug instrumentation, verification environment adaptation, and hardware/software co-validation.
• Mentor applications engineers globally, lead technical workshops and architecture reviews, and represent Synopsys at customer sites and industry forums.

Requirements

Must-have technical skills and hands-on experience; strong candidates will meet most items below.

• 10+ years working in FPGA implementation, ASIC design, ASIC verification, hardware-assisted verification, FPGA prototyping, or emulation.
• Deep expertise in FPGA synthesis, place-and-route, multi-FPGA partitioning, timing closure, and constraint development using Xilinx Vivado, Intel Quartus, or equivalent tools.
• Strong working knowledge of SystemVerilog, UVM, assertions, functional coverage, and verification testbench architecture.
• Hands-on experience with interface IP including PCIe, DDR4/DDR5, LPDDR, HBM, Ethernet, USB, AXI, CXL, or high-speed SerDes protocols.
• Proficiency in Tcl, Python, or shell scripting for automation and flow development.
• Experience reproducing and resolving customer escalations across RTL, FPGA tool flows, and hardware bring-up.
• Nice-to-have: direct experience with Synopsys HAPS and ProtoCompiler, and familiarity with emulation platforms such as ZeBu, Palladium, Protium, or Veloce.

Education Requirements

Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or equivalent hands-on experience.

About the Company

Company: Synopsys

Headquarters: Mountain View, California, USA

Synopsys is a leading company in electronic design automation (EDA) and semiconductor IP solutions. It provides tools and services for designing and verifying complex semiconductor devices and systems. The company plays a pivotal role in the semiconductor industry, helping engineers innovate and deliver higher-quality products faster. Synopsys is committed to advancing technology standards and offers a range of software and hardware solutions to its clients globally.