Job Title
Senior Staff Applications Engineer
Role Summary
As a Senior Staff Applications Engineer on the Silicon Product Enablement team, you will support application designs, vendors and customers to enable silicon features and factory processes. You will bridge customer and factory needs, resolve technical issues, and deliver enablement materials, trainings, and factory support to reduce customer time-to-market.
Primary focus areas include domain ownership (for example IO, Memory, SerDes), silicon feature enablement, and cross-functional collaboration with sales, R&D and manufacturing.
Experience Level
Senior-level. Requires 15+ years of relevant industry experience.
Responsibilities
The role is responsible for technical enablement, domain leadership, customer and factory support, and cross-functional collaboration.
- Lead silicon feature enablement and improvement for a specific domain (IO, Memory, SerDes, etc.).
- Develop silicon enablement collateral focused on usability and performance.
- Design and deliver trainings and workshops for sales and technical support teams.
- Provide factory support and technical guidance to resolve customer issues.
- Collaborate with sales and R&D to capture customer requirements and translate them into product and enablement work.
- Participate across the product development lifecycle from architecture and specification through release and customer support.
Requirements
Must-have technical skills and experience; nice-to-have items follow.
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Must-have: Hands-on FPGA and/or firmware bring-up and debugging experience using oscilloscopes and signal analyzers.
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Must-have: Deep experience with FPGA architecture and foundational blocks such as PLLs, embedded memory, DSP blocks, and I/O blocks.
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Must-have: Expertise in FPGA design flows and RTL using Verilog and/or VHDL.
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Must-have: Experience delivering revenue-generating hardware products and participation in all aspects of product development.
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Must-have: Strong written and verbal English communication skills; able to work independently and in teams.
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Nice-to-have: Experience with physical interface standards (SSTL, HSTL, LVSTL, HSUL).
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Nice-to-have: Experience with timing closure, PLL/DLLs, physical interface strategies and signal integrity.
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Nice-to-have: Hands-on FPGA development experience including RTL development and verification.
Education Requirements
Bachelor's or Master's degree in Electrical Engineering (BS/MS in EE) is specified, together with 15+ years of relevant industry experience.
About the Company
Company: Lattice
Headquarters: Hillsboro, Oregon, United States
Lattice develops low-power, small form-factor programmable logic devices (FPGAs) and supporting software for communications, computing, industrial, and consumer markets. The company emphasizes R&D, product innovation, and global engineering and manufacturing support for customers and partners.

Date Posted: 2026-05-19