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Senior STA Engineer

Qualcomm
September 25, 2026
Full-time
On-site
Noida, Uttar Pradesh, India
Physical Design Jobs, Level - Senior

Job Title

Senior STA Engineer

Role Summary

As a Static Timing Analysis (STA) engineer on the ASICs Engineering team, you will perform STA, timing closure, and physical-implementation support to deliver high-performance, low-power SoC blocks. You will work with design, verification, and physical teams to identify timing bottlenecks and implement fixes to meet PPA targets.

Experience Level

Senior - typically requires 3+ years of STA or physical implementation experience.

Responsibilities

Key responsibilities include:

  • Perform static timing analysis across process, voltage, and temperature corners to identify critical timing paths.
  • Define and apply timing constraints and advise physical implementation teams on closure strategies.
  • Prepare and execute complex ECOs (Tweaker/Tempus/Physical PT ECOs) for timing convergence across large corner sets.
  • Diagnose and fix extreme critical timing bottlenecks and iterate with synthesis/place-and-route flows.
  • Implement and recommend power-minimization techniques and trade-offs for PPA.
  • Automate timing flows and analyses using scripting and industry tools.
  • Collaborate with design, verification, and backend teams to meet project schedules and PPA goals.

Requirements

Essential skills and experience:

  • 3+ years of experience in static timing analysis, timing constraints, and physical implementation aspects.
  • Practical experience with industry-standard tools such as PrimeTime (PT), Tempus, Genus, Innovus, ICC.
  • Proven ability to prepare complex ECOs and drive timing convergence across many corners.
  • Strong scripting skills in Perl and TCL to automate STA and related flows.
  • Solid fundamentals in digital timing and implementation.

Nice-to-have:

  • Experience with deep-submicron process nodes.
  • Knowledge of high-performance and low-power implementation methods.
  • Demonstrated success pushing PPA to aggressive targets.

Education Requirements

Bachelor's degree in Science, Engineering, or a related field (with 2+ years of ASIC design/verification/validation/integration experience), or a Master's degree in Science, Engineering, or a related field (with 1+ year of relevant experience), or a PhD in a related field. Equivalent practical experience is accepted where specified.


About the Company

Company: Qualcomm

Headquarters: San Diego, California, United States

Qualcomm is a global leader in semiconductor and telecommunications equipment, specializing in mobile technologies and innovations. Known for its Adreno GPUs, the company provides solutions enabling advancements in mobile gaming, AI, VR/AR, and autonomous driving. Qualcomm's cutting-edge technology and commitment to high-performance, power-efficient designs drive the evolution of mobile graphics and connectivity worldwide.

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Date Posted: 2026-09-23