Senior Software Architect
Cadence Design SystemsJob Title
Senior Software Architect
Role Summary
Architect the next generation of hardware verification technology for Xcelium, focusing on RTL/logic simulation and timing-constraints verification. Work in a geographically distributed System Verification Group to design scalable algorithms and implement performance-optimized C/C++ solutions for very large graphs used in AI and hyperscale chip designs.
Experience Level
Senior - typically requires extensive industry experience; this role expects seasoned engineers with 10+ years of relevant experience.
Responsibilities
Deliver enhancements, performance improvements, and technical leadership for the Xcelium simulator and related timing-constraints technology.
- Design and extend RTL/logic simulator engine features for Xcelium.
- Develop and refine Timing Constraints Verification technology and SDC constraints support.
- Design, tune, and innovate graph algorithms for multi‑billion‑node graphs.
- Perform deep-dive bottleneck analysis and implement performance optimizations in C/C++ to improve compile speed and memory footprint.
- Lead and mentor junior engineers; collaborate with global team members in a distributed environment.
- Participate in technical discussions, code reviews, and process improvements.
- Write specifications and unit tests for delivered code.
Requirements
Must-have technical skills and experience for successful candidates.
- 10+ years of experience in EDA software development.
- Strong background in RTL/logic simulation, SDC constraints, and timing analysis (including path exceptions handling in STA tools).
- Excellent programming skills in C/C++.
- Deep understanding of SystemVerilog or Verilog.
- Experience with multi-threaded and concurrent programming.
- Proven ability to profile, diagnose, and optimize performance and memory usage at scale.
- Experience working in distributed teams and providing technical leadership.
- Nice-to-have: prior experience specifically on RTL/logic simulation software development.
Education Requirements
MS in Computer Science or Electrical Engineering with a minimum of 12 years of experience, or PhD with a minimum of 10 years of experience. No certifications or equivalent-experience language was specified in the posting.
About the Company
Company: Cadence Design Systems
Headquarters: San Jose, California, USA
Cadence Design Systems is a global electronic design automation company that provides software, hardware, and intellectual property for designing advanced semiconductor chips. With over 25 years in the industry, Cadence is known for its innovative technology solutions and has been recognized by Fortune Magazine as one of the 100 Best Companies to Work For. The company is dedicated to solving complex technical challenges in order to enable customers to create revolutionary products and experiences.
